SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Features  Provides jitter attenuation and frequency translation between SONET/PDH and Ethernet  Supports ITU-T G.8262 Synchronous Ethernet equipment slave clock (EEC option 1 and 2) requirements with optional Stratum 3 compliant timing card clock source  Two clock inputs/two clock outp

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet

Description The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inpu

功能：时钟乘法器 包装：散装 描述：BOARD EVAL SI5315 8KHZ-644.53MHZ 开发板，套件，编程器 评估和演示板及套件

2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5330/AD5331/AD5340/AD53411 are single 8-/10-/12- bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 115 μA at 3 V and feature a power-down mode that further reduces the current to 80 nA. The devices incorporate an on-chip output buffer that can drive the

2.5 V to 5.5 V, 230uA, Parallel Interface Dual Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5332/AD5333/AD5342/AD5343 are dual 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 230 µA at 3 V, and feature a power-down pin, PD that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can dr

Variable Divided Voltage Generator for LCD Use

Overview The LA5315M is a variable divided voltage generator IC for multiple drive of LCD matrix. Features • Power supply for variable bias LCD drive (1/5 to 1/13 bias available by internal resistances). • 5 voltage outputs. • Low current drain (1.5mA max). • Miniflat package.

SONET/SDH Payload Extractor/Aligner for 2488 Mbit/s

FEATURES • Monolithic SONET/SDH Payload Extractor/Aligner for use in interface applications, operating at serial interface speeds of up to 2488 Mbit/s: • single STS-48c (STM-16/AU4-16c); • single STS-48 (STM-16/AU4- 4c/AU4/AU3/TU3); • quad STS-12c (STM-4/AU4-4c);

2.5 V to 5.5 V, 500 uA, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs

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