丝印代码：S160；Super-Fast Rectifiers

文件：336.55 Kbytes Page：3 Pages

丝印代码：S160；Ultrafast power diode

文件：397.49 Kbytes Page：10 Pages

Linear Shaft Motor

文件：817.79 Kbytes Page：4 Pages

包装：散装 描述：CUTTER OVAL BEVEL 工具 钢丝钳

丝印代码：S1600A；STANDARD RECTIFIER

Features · Glass Passivated Chip · Low Forward Voltage Drop · Low Profile package · High Surge Current Capability · Easy pick and place · Plastic Case Material has UL Flammability Classification Rating 94V-O

丝印代码：S160F；Super-Fast Rectifiers

文件：232.97 Kbytes Page：3 Pages

Si 光电二极管

•在可见光到近红外范围内具有高灵敏度 •低暗电流 •优异的线性度 •与无铅回流焊兼容;

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

SYVCHRONOUS DRAM

[SPECTEK] General Description: The 128Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. Each is internally configured as a quad-bank DRAM. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a prog

TVS ARRAY SERIES

Protects 3.3, 5, 12, 15, 24 V Components Unidirectional Provides Electrically Isolated Protection 300 W @ 8/20 us Protects 8 Lines SO-16 Packaging “-A” is an AEC-Q101 qualified device This is a Pb - Free Device All SMC parts are traceable to the wafer lot Additional testing can be offered

TVS ARRAY SERIES

Protects 3.3, 5, 12, 15, 24 V Components Unidirectional Provides Electrically Isolated Protection 300 W @ 8/20 us Protects 8 Lines SO-16 Packaging “-A” is an AEC-Q101 qualified device This is a Pb - Free Device All SMC parts are traceable to the wafer lot Additional testing can be offered

SKINTOP® SLM/SLRM Strain relief with metric thread

Application advantage • The heavy duty SKINTOP® design provides great pullout strength and very reliable strain relief • Superior integrated locking mechanism includes an internal ratchet for vibration-proof protection • Multi-trapezoidal thread requires just one twist to tighten • Generous

SKINTOP® SLM/SLRM Strain relief with metric thread

Application advantage • The heavy duty SKINTOP® design provides great pullout strength and very reliable strain relief • Superior integrated locking mechanism includes an internal ratchet for vibration-proof protection • Multi-trapezoidal thread requires just one twist to tighten • Generous

Lan transformer

单口百兆POE贴片网络变压器

包装：散装 描述：RELAY GEN PURPOSE SPDT 8A 24V 继电器 功率继电器，高于 2 A

SO-16

文件：129.08 Kbytes Page：4 Pages

SO-16

文件：129.08 Kbytes Page：4 Pages

Linear Shaft Motor

文件：817.79 Kbytes Page：4 Pages

Linear Shaft Motor

文件：817.79 Kbytes Page：4 Pages

Linear Shaft Motor

文件：817.79 Kbytes Page：4 Pages

Linear Shaft Motor

文件：817.79 Kbytes Page：4 Pages

Linear Shaft Motor

文件：817.79 Kbytes Page：4 Pages

Linear Shaft Motor

文件：817.79 Kbytes Page：4 Pages

Linear Shaft Motor

文件：817.79 Kbytes Page：4 Pages