Product Description

The PTX105R is a highly integrated NFC reader

IC for contactless communication, which is

optimized for reader performance and

interoperability (Vcc current up to 500mA).

While eliminating EMC filter and matching

components, the PTX105R enables simple

integration and compact design without the

complexity associated with existing solutions

(dual resonating circuits composed by EMC

filter and antenna).

Due to its modular Soft Controller architecture,

the NFC functionalities are integrated into a

split stack solution where time-critical

operations are running on the on-chip MCU,

and the rest of the NFC logic is in the host

controller to carry out applications such as IOT

reader and POS.

Features

The architecture enables:

• Efficient power transmission with accurate

digital programmability of RF carrier and

modulation shape

• EMC filter removal due to sinewave output

driver and Direct Antenna Connection

(DiRAC)

• -80dBc RX sensitivity with full dynamic

range due to DiRAC

• SDK composed of FW and SW integrated in

a Split Stack architecture with Over-The-Air

firmware update on the host processor:

- Modular SW stack running on the Host

architecture

- Integrated FW running on the on-chip

MCU for timing critical operations

1 Depending on the Software Stack, full NFC Forum Poller

functionality or EMVCo® L1 is supported by PTX105R.

• Fractional-N PLL to support any reference

input clock frequency from 13.15MHz to

52MHz

• Low Power Card Detection (LPCD)

• ISO/IEC14443-A reader/writer mode up to

848kBit/s

• ISO/IEC14443-B reader/writer mode up to

848kBit/s

• NFC Forum Poller mode

• Supports reading of NFC Tag Type 2, 3,

4A/4B and 5

• FeliCa reader/writer mode 212&424kBit/s

• ISO/IEC 15693 reader/writer mode

• NFC Forum P2P Passive Initiator

• NFC Card Emulation Mode for Tag Type 4A

(106kBit/s)

• Low Power Field Detection (LPFD)

• EMVCo® 3.0/3.1 PCD L1 compliancy1

• Supported host interfaces: I2C, SPI, UART

PTX105R reader IC enables key improvements

in customer care-about such as:

RF performance: Patented groundbreaking

architecture enables efficient power

transmission and -80dBc RX sensitivity, state of

the art reader performance even in challenging

and complex integration environments.

Interoperability:

• Digitized architecture enables accurate

shape control of the modulated signal.

• Elimination of the EMC filter results in wellbehaved signal shape avoiding overshoot

and undershoot

• DiRAC allows minimum output power loss

on matching structure with high input

sensitivity, which translates to

substantially larger operating volume.