Features

• Two selectable single-ended input reference clocks

• Eight single-ended clock outputs

• Internal PLL does not require external loop filter components

• 5V tolerant inputs

• Maximum output frequency: 160MHz, (2XQ output)

• Maximum output frequency: 80MHz, (Q0:Q4 and nQ5 outputs)

• LVCMOS interface levels for all inputs and outputs

• PLL disable feature for low-frequency testing

• PLL lock output

• Selectable synchronization of output to input edge

• Output drive capability: ±24mA

• Output skew: 300ps (maximum), Q0:Q4

• Output skew: 500ps (maximum), all outputs

• Full 3.3V supply voltage

• Available in lead-free (RoHS 6) packages

• -40°C to 85°C ambient operating temperature