FEATURES

• Five differential HSTL compatible outputs

• Selectable differential CLK0, nCLK0 or LVCMOS/LVTTL

clock inputs

• CLK0, nCLK0 pair can accept the following differential

input levels: LVDS, LVPECL, HSTL, HCSL

• CLK1 can accept the following input levels:

LVCMOS or LVTTL

• Output frequency up to 700MHz

• Translates any single ended input signal to HSTL levels

with resistor bias on nCLK0 input

• Output skew: 40ps (maximum)

• Part-to-part skew: 300ps (maximum)

• Propagation delay: 1.8ns (maximum)

• 3.3V core, 1.8V output operating supply

• Available in Lead-Free (RoHS 6) package

• -40°C to 85°C ambient operating temperature

• For functional replacement part use 8523