1.1 Features

• High-speed H8S/2000 central processing unit with an internal 16-bit architecture Upward-compatible with H8/300 and H8/300H CPUs on an object level Sixteen 16-bit general registers 65 basic instructions

• Various peripheral functions

DMA controller (DMAC)

Data transfer controller (DTC)

16-bit timer-pulse unit (TPU)

Programmable pulse generator (PPG)

8-bit timer (TMR)

Watchdog timer (WDT)

Asynchronous or clocked synchronous serial communication interface (SCI)

I2C bus interface 2 (IIC2)

10-bit A/D converter

8-bit D/A converter

Clock pulse generator