Features

▪ Single 1.7 V - 2.0 V Supply

▪ 128-Mbit (16 x 8 Mbit physical block) Flash Memory

▪ Serial Peripheral Interface (SPI) and Quad Peripheral Interface (QPI) Compatible

• Supports SPI Modes 0 and 3

• Supports Dual Output Read and Quad I/O Program and Read

• Supports QPI Program and Read

• 133 MHz Maximum Operating Frequency

• Clock-to-Output (tV1) of 6 ns

• Up to 65 Mbytes/s continuous data transfer rate

▪ Quad enabled (factory default settings; see Section 7.7).

▪ Full Chip Erase

▪ Flexible, Optimized Erase Architecture for Code and Data Storage Applications

• 0.6 ms Typical Page Program (256 bytes) Time

• 60 ms Typical 4-kB Block Erase Time

• 200 ms Typical 32-kB Block Erase Time

• 350 ms Typical 64-kB Block Erase Time

▪ Hardware Controlled Locking of Status Registers via WP Pin

▪ 4-kbit secured One-Time Programmable Security Register

▪ Hardware Write Protection

▪ Serial Flash Discoverable Parameters (SFDP) Register

▪ Flexible Programming

• Byte/Page Program (1 to 256 bytes)

• Dual or Quad Input Byte/Page Program (1 to 256 bytes)

▪ Erase/Program Suspend and Resume

▪ JEDEC Standard Manufacturer and Device ID Read Methodology

▪ Low Power Dissipation

• 2 µA Deep Power-Down Current (Typical)

• 10 µA Standby current (Typical)

• 5 mA Active Read Current (Typical)

▪ Endurance: 100,000 program/erase cycles (4-kbyte, 32-kbyte, or 64-kbyte blocks)

▪ Data Retention: 20 Years

▪ Industrial Temperature Range: -40 °C to +85 °C

▪ Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

• 8-pad DFN (6 x 5 x 0.6 mm)

• 21-ball die Ball Grid Array (dBGA - WLCSP)

• 21-ball low-profile die Ball Grid Array (dBGA - WLCSP)