FEATURES

• Two LVCMOS / LVTTL outputs

• Differential CLK, nCLK input pair

• CLK, nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• Maximum output frequency: 350MHz

• Output skew: 15ps (maximum)

• Part-to-part skew: 600ps (maximum)

• Additive phase jitter, RMS: 0.03ps (typical)

• Small 8 lead SOIC package saves board space

• 3.3V core, 3.3V, 2.5V or 1.8V output operating supply

• -40°C to 85°C ambient operating temperature

• Available in lead-free RoHS (6) package