包装：袋 描述：IN-LINE INTERCONNECT IND RJ45 JA 连接器，互连器件 模块化连接器适配器

20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates. FEATURES • Wide supply voltage range of

20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates. FEATURES • Wide supply voltage range of

20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ALVT16821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V. FEATURES • 20-bit positive-edge triggered register • 5V I/O Compati

20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ALVT16821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V. FEATURES • 20-bit positive-edge triggered register • 5V I/O Compati

20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ABT16821A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. FEATURES • 20-bit positive-edge triggered register • Multiple VCC and GND pins minimize switching noise • Live insertion/extraction permitte