Single Positive Edge-triggered D-type Flip Flop

Description The RD74LVC1G79 has D-type flip flop in a 5-pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption exten

Single D-type flip-flop; positive-edge trigger

DESCRIPTION The 74LVC1G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. FEATURES

Single D-type flip-flop; positive-edge trigger

Single D-type flip-flop; positive-edge trigger

1. General description The 74LVC1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V

Single D-type flip-flop; positive-edge trigger

Single D-type flip-flop; positive-edge trigger

DESCRIPTION The 74LVC1G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. FEATURES