FemtoClock 2 Jitter Attenuator and Clock Generator

Features ▪ Can be configured as clock generator or jitter attenuator/synchronizer ▪ Low power, less than 0.8W typical ▪ Low jitter, less than 50fs-RMS ▪ Compliant with ITU-T G.8262 and G.8262.1 option 1 and 2 for synchronous Ethernet Equipment Clock (EEC/eEEC) without degrading output jitte

FemtoClock 2 Jitter Attenuator or Clock Generator

The RC32508A regenerates and distributes ultra-low jitter clock outputs and features up to 2 independent frequency domains that can be either locked to the external reference clock or locked to a free-run crystal or oscillator. Digital PLL (DPLL) support hitless reference switching between reference • Can be configured as clock generator or jitter attenuator/synchronizer\n• Low power, less than 0.8W typical\n• Low jitter, less than 50fs-RMS\n• Compliant with ITU-T G.8262 & G.8262.1 option 1 and 2 for synchronous Ethernet Equipment Clock (EEC/eEEC) without degrading output jitter\n• Jitter atten;

6-/8-/12-Port DS3/E3/STS-1 LIU

GENERAL DESCRIPTION The DS32506 (6 port), DS32508 (8 port), and DS32512 (12 port) line interface units (LIUs) are highly integrated, low-power, feature-rich LIUs for DS3, E3, and STS-1 applications. Each LIU port in these devices has independent receive and transmit paths, a jitter attenuator, fu

6-/8-/12-Port DS3/E3/STS-1 LIU

GENERAL DESCRIPTION The DS32506 (6 port), DS32508 (8 port), and DS32512 (12 port) line interface units (LIUs) are highly integrated, low-power, feature-rich LIUs for DS3, E3, and STS-1 applications. Each LIU port in these devices has independent receive and transmit paths, a jitter attenuator, fu

Film Capacitors Metallized Polyester Film Capacitors (MKT)

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1.1 V to 5.5 V, Slew Rate Controlled Load Switch in TSOT23-6

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1.1 V to 5.5 V, Slew Rate Controlled Load Switch in TSOT23-6

文件：274.84 Kbytes Page：13 Pages