CMOS System Reset

Outline This IC is a system reset IC developed using the CMOS process. Super low consumption current of 0.25µA typ. has been achieved through use of the CMOS process. Also, detection voltage is high precision detection of ±2. Features 1. Super low consumption current 0.25µA typ. (when VDD

IC for CMOS System Reset

Outline This IC is a system reset IC developed using the CMOS process. Super low consumption current of 0.25µA typ. has been achieved through use of the CMOS process. Also, detection voltage is high precision detection of ±2. Features 1. Super low consumption current 0.25µA typ. (when VDD

Dual P-Channel Enhancement Mode Field Effect Transistor

FEATURES -30V, -5.3A, RDS(ON) = 45mW @VGS = -10V. RDS(ON) = 80mW @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Surface mount Package. RoHS compliant.

Beaded Ties

文件：106.3 Kbytes Page：1 Pages

OR gate

文件：84.96 Kbytes Page：1 Pages

Migrating a microcontroller application from STM32F1 to STM32F2 series

文件：381.9 Kbytes Page：52 Pages

DUAL 1A, 1.5MHz SYNCHRONOUS STEP-DOWN DC-DC CONVERTER

文件：621.72 Kbytes Page：9 Pages