型号 功能描述 生产厂家 企业 LOGO 操作
PLSI1032E-70LJ

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

PLSI1032E-70LJ

High-Density Programmable Logic

文件:301.86 Kbytes Page:17 Pages

Lattice

莱迪思

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

In-System Programmable High Density PLD

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

PLSI1032E-70LJ产品属性

  • 类型

    描述

  • 型号

    PLSI1032E-70LJ

  • 制造商

    LATTICE

  • 制造商全称

    Lattice Semiconductor

  • 功能描述

    High-Density Programmable Logic

更新时间:2025-11-18 20:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTICE/莱迪斯
25+
PLCC
54648
百分百原装现货 实单必成 欢迎询价
LATTE/莱迪斯
24+
NA/
3391
原厂直销,现货供应,账期支持!
LATTICE/莱迪斯
24+
PLCC
990000
明嘉莱只做原装正品现货
LATTICE
07+
PLCC
3
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LATTICE/莱迪斯
2450+
QFP
9850
只做原厂原装正品现货或订货假一赔十!
LATTICE
2023+
PLCC
50000
原装现货
LATTICE
24+
PLCC
3000
只做原装正品现货 欢迎来电查询15919825718
GPS
23+
NA
549
专做原装正品,假一罚百!
LATTICE/莱迪斯
22+
PLCC
12245
现货,原厂原装假一罚十!
LATTICE/莱迪斯
QQ咨询
PLCC
1348
全新原装 研究所指定供货商

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