型号 功能描述 生产厂家 企业 LOGO 操作
PLSI1032E-70LJ

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

PLSI1032E-70LJ

High-Density Programmable Logic

文件:301.86 Kbytes Page:17 Pages

Lattice

莱迪思

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

High-Density Programmable Logic

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

In-System Programmable High Density PLD

Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements

Lattice

莱迪思

PLSI1032E-70LJ产品属性

  • 类型

    描述

  • 型号

    PLSI1032E-70LJ

  • 制造商

    LATTICE

  • 制造商全称

    Lattice Semiconductor

  • 功能描述

    High-Density Programmable Logic

更新时间:2025-9-27 9:35:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTICE/莱迪斯
25+
PLCC
54648
百分百原装现货 实单必成 欢迎询价
LATTICE/莱迪斯
23+
PLCC-44
364122
原厂授权一级代理,专业海外优势订货,价格优势、品种
Lattice
24+
PLCC44
80000
只做自己库存 全新原装进口正品假一赔百 可开13%增
PHI
24+
DIP-20
37500
原装正品现货,价格有优势!
LATTICE
原厂封装
9800
原装进口公司现货假一赔百
2023+
5800
进口原装,现货热卖
2023+
3000
进口原装现货
LATTICE
23+
PLCC
200
现货库存
LATTICE/莱迪斯
24+
PLCC44
23000
只做正品原装现货
Lattice
23+
PLCC44
3845
全新原装正品现货,支持订货

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