Programmable logic array 22 횞 42 횞 10

DESCRIPTION The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming I/O polarity and direction. All AND gates are linked to 12 inputs (I) and 10 bidirectional I/O lines (B). These yield variable I/O gate configurations

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes: – Parallel Load – Do Nothing (Hold) For Application as Bus Buffer Registers Pac

Combination of Thin, Flexible

文件：659.91 Kbytes Page：2 Pages

RUGGED and LIGHTWEIGHT ALUMINUM BATTERY HOLDERS

文件：115.71 Kbytes Page：2 Pages

Temperature Sensors Line Guide

文件：736.09 Kbytes Page：11 Pages

RUGGED & LIGHTWEIGHT ALUMINUM BATTERY HOLDERS

文件：418.49 Kbytes Page：1 Pages