PIC18LF25K22价格

参考价格:¥13.6747

型号:PIC18LF25K22-I/ML 品牌:Microchip 备注:这里有PIC18LF25K22多少钱,2025年最近7天走势,今日出价,今日竞价,PIC18LF25K22批发/采购报价,PIC18LF25K22行情走势销售排行榜,PIC18LF25K22报价。
型号 功能描述 生产厂家 企业 LOGO 操作
PIC18LF25K22

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

PIC18LF25K22

Flash Memory Programming Specification

文件:545.77 Kbytes Page:42 Pages

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

文件:5.67499 Mbytes Page:496 Pages

Microchip

微芯科技

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

文件:5.67499 Mbytes Page:496 Pages

Microchip

微芯科技

PIC18LF25K22产品属性

  • 类型

    描述

  • 型号

    PIC18LF25K22

  • 功能描述

    8位微控制器 -MCU 32KB Flash 1536B RAM 8b FamilynanoWat XLP

  • RoHS

  • 制造商

    Silicon Labs

  • 核心

    8051

  • 处理器系列

    C8051F39x

  • 数据总线宽度

    8 bit

  • 最大时钟频率

    50 MHz

  • 程序存储器大小

    16 KB 数据 RAM

  • 大小

    1 KB 片上

  • ADC

    Yes

  • 工作电源电压

    1.8 V to 3.6 V

  • 工作温度范围

    - 40 C to + 105 C

  • 封装/箱体

    QFN-20

  • 安装风格

    SMD/SMT

更新时间:2025-10-16 16:53:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
MICROCHIP
23+
SSOP28
5700
全新原装现货,假一赔十
MICROCHIP
25+23+
SSOP28
25668
绝对原装正品全新进口深圳现货
MICROCHIP/美国微芯
24+
QFN-28
30000
原装正品公司现货,假一赔十!
MICROCHIP/微芯
22+
SSOP
9000
原装正品,支持实单!
MICROCHIP
25+
SPDIP-28
3000
全新原装、诚信经营、公司现货销售!
MICROCHIP
21+
SSOP28
10000
只做原装,质量保证
MicrochipTechnology
24+
原厂原装
6000
进口原装正品假一赔十,货期7-10天
MICROCHIP
23+
SSOP28
10000
正规渠道,只有原装!
Microchip(微芯)
2526+
SSOP-28
50000
只做原装优势现货库存,渠道可追溯
MICROCHIP/微芯
23+
SOP28
206000
原厂授权一级代理,专业海外优势订货,价格优势、品种

PIC18LF25K22数据表相关新闻