28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio

Flash Memory Programming Specification

文件：545.77 Kbytes Page：42 Pages

Adding Intelligence to Lighting Applications

文件：863.27 Kbytes Page：20 Pages

Silicon Errata and Data Sheet Clarification

文件：348.14 Kbytes Page：10 Pages

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

High-Performance RISC CPU: • C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Addressing • Up to 16 MIPS Operatio