丝印代码：011011；50 V, 500 mA PNP resistor-equipped transistors

1.1 General description PNP Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. 1.2 Features and benefits 1.3 Applications Table 1. Product overview Type number R1 R2 Pac

50 V, 500 mA NPN resistor-equipped transistors

Features and benefits  500 mA output current capability  Built-in bias resistors   10 resistor ratio tolerance  Simplifies circuit design  Reduces component count  Reduced pick and place costs  Low package height of 0.37 mm  Suitable for Automatic Optical Inspection (AOI) of sold

丝印代码：011011；50 V, 500 mA PNP resistor-equipped transistors

Features and benefits  500 mA output current capability  Built-in bias resistors   10 resistor ratio tolerance  Simplifies circuit design  Reduces component count  Reduced pick and place costs  Low package height of 0.37 mm  Suitable for Automatic Optical Inspection (AOI) of sold

50 V, 500 mA PNP resistor-equipped transistors

PNP Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads.\nTable 1. Product overview Type number\n R1\n R2\n Package Nexperia\n NPN complement\n PDTB113EQA\n 1 • 500 mA output current capability\n• Built-in bias resistors\n• ± 10% resistor ratio tolerance\n• Simplifies circuit design\n• Reduces component count\n• Reduced pick and place costs\n• Low package height of 0.37 mm\n• Suitable for Automatic Optical Inspection (AOI) of solder joint\n• AEC-Q101 ;

丝印代码：011011；50 V, 500 mA PNP resistor-equipped transistors

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封装/外壳：3-XDFN 裸露焊盘 包装：卷带（TR） 描述：TRANS PREBIAS PNP 3DFN 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

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This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. The

Bias Resistor Transistor PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network

The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its xternal resistor bias network. The BRT eliminate

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The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminat

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0.25關m Sea of Gates and Customer Structured Arrays

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