型号 功能描述 生产厂家 企业 LOGO 操作
PDM41024

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分类制造商

PDM41024产品属性

  • 类型

    描述

  • 型号

    PDM41024

  • 功能描述

    1 Megabit Static RAM 128K x 8-Bit

更新时间:2025-12-15 9:31:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
PARADIGM
24+
SOJ
20000
全新原厂原装,进口正品现货,正规渠道可含税!!
PARADIG
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SOJ-32
96800
原厂授权一级代理,专业海外优势订货,价格优势、品种
PARADIG
SOJ32
53650
一级代理 原装正品假一罚十价格优势长期供货
PARADIGM
24+
LCC
66800
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PARADIGM
9349+
DIP32
28
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PARADIC
24+
CDIP
80000
只做自己库存 全新原装进口正品假一赔百 可开13%增
PARADIGM
05+
原厂原装
228
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PAR
24+/25+
91
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PARADIGM
25+
126
公司优势库存 热卖中!
PARADGM
2023+
5800
进口原装,现货热卖

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