Bus interface registers

DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. FEATURES • High speed parallel registers with positive edge-triggered D-t

Bus interface registers

DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. FEATURES • High speed parallel registers with positive edge-triggered D-t

Bus interface registers

封装/外壳：24-SOIC（0.295"，7.50mm 宽） 功能：标准 包装：管件 描述：IC FF D-TYPE SNGL 10BIT 24SO 集成电路（IC） 触发器

IC FF D-TYPE SNGL 10BIT 24DIP

封装/外壳：24-DIP（0.300"，7.62mm） 功能：标准 包装：管件 描述：IC FF D-TYPE SNGL 10BIT 24DIP 集成电路（IC） 触发器

10-Bit D-Type Flip-Flop

General Description The 74F821 is a 10-bit D-type flip-flop with 3-STATE true outputs arranged in a broadside pinout. Features ■ 3-STATE Outputs

Bus interface registers

DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. FEATURES • High speed parallel registers with positive edge-triggered D-t

10-Bit D-Type Flip-Flop

General Description The 74F821 is a 10-bit D-type flip-flop with 3-STATE true outputs arranged in a broadside pinout. Features ■ 3-STATE Outputs

10-Bit D-Type Flip-Flop

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10-Bit D-Type Flip-Flop

文件：153.72 Kbytes Page：8 Pages