64-bit TTL bipolar RAM, non-inverting 3-State

DESCRIPTION The 74F219A is a high speed, 64–bit RAM organized as a 16–word by 4–bit array. Address inputs are buffered to minimize loading and are fully decoded on chip. The outputs are in high impedance state whenever the chip enable (CE) is high. The outputs are active only in the READ mode (WE

64-bit TTL bipolar RAM, non-inverting 3-State

64-bit TTL bipolar RAM, non-inverting 3-State

DESCRIPTION The 74F219A is a high speed, 64–bit RAM organized as a 16–word by 4–bit array. Address inputs are buffered to minimize loading and are fully decoded on chip. The outputs are in high impedance state whenever the chip enable (CE) is high. The outputs are active only in the READ mode (WE

64-bit TTL bipolar RAM, non-inverting 3-State

DESCRIPTION The 74F219A is a high speed, 64–bit RAM organized as a 16–word by 4–bit array. Address inputs are buffered to minimize loading and are fully decoded on chip. The outputs are in high impedance state whenever the chip enable (CE) is high. The outputs are active only in the READ mode (WE

64-Bit Random Access Memory with TRI-STATEE Outputs

文件：164.2 Kbytes Page：8 Pages

64-Bit Random Access Memory with TRI-STATEE Outputs

文件：164.2 Kbytes Page：8 Pages

64-Bit Random Access Memory with TRI-STATEE Outputs

文件：164.2 Kbytes Page：8 Pages