8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA

8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA

8-bit bidirectional universal shift register

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：通用 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SHIFT REGISTER 8BIT 16SOIC 集成电路（IC） 移位寄存器

IC SHIFT REGISTER 8BIT 16-DIP

封装/外壳：16-DIP（0.300"，7.62mm） 功能：通用 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SHIFT REGISTER 8BIT 16-DIP 集成电路（IC） 移位寄存器

8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA

8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA

8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA