丝印代码：MX573AB；Ultra-Low Jitter 106.25MHz LVDS XO

文件：1.45665 Mbytes Page：3 Pages

丝印代码：MX573AB；Ultra-Low Jitter 106.25MHz LVDS XO

文件：1.45665 Mbytes Page：3 Pages

丝印代码：MX573EB；Ultra-low Jitter 125MHz LVPECL XO

文件：1.21325 Mbytes Page：4 Pages

丝印代码：MX573EB；Ultra-low Jitter 125MHz LVPECL XO

文件：1.21325 Mbytes Page：4 Pages

丝印代码：MX573EB；Ultra-Low Jitter 125MHz LVDS XO

文件：1.86433 Mbytes Page：4 Pages

丝印代码：MX573EB；Ultra-Low Jitter 125MHz LVDS XO

文件：1.86433 Mbytes Page：4 Pages

UltraLow Jitter Products

The MX573BBA312M500 is an ultra-low phase jitter XO with LVPECL output optimized for high line rate applications.. ·312.5MHz LVPECL\n·Typical phase noise: 80fs (integration range: 1.875MHz to 20MHz)\n·±50ppm total frequency stability\n·–40°C to +85°C temperature range\n·Industry standard 6-pin 7mm x 5mm LGA package;

UltraLow Jitter Products

The MX573BBB156M250 is an ultra-low phase jitter XO with LVDS output optimized for high line rate applications.. ·156.25MHz LVDS\n·Typical phase noise: 80fs (integration range: 1.875MHz to 20MHz)\n·±50ppm total frequency stability\n·–40°C to +85°C temperature range\n·Industry standard 6-pin 7mm x 5mm LGA package;

封装/外壳：6-SMD，无引线 功能：启用/禁用 包装：管件 描述：XTAL OSC XO 212.5000MHZ LVPECL 晶体，振荡器，谐振器 振荡器

封装/外壳：6-SMD，无引线 功能：启用/禁用 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：XTAL OSC XO 106.2500MHZ LVDS SMD 晶体，振荡器，谐振器 振荡器

Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC573A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as

Octal D-Type Latch with 3-State Outputs With 5 V?뭈olerant Inputs

The MC74LVX573 is an advanced high speed CMOS octal latch with 3−state outputs. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. This 8−bit D−type latch is controlled by a latch enable input and an output enable input. When the output enable inpu

Schottky Barrier Rectifier

Description: The NTE573 is an axial lead metal–to–silicon power diode using the Schottky Barrier principle. State–of–the–art geometry features epitaxial construction with oxide passivation and metal overlap contact. This device is ideally suited for use in low–voltage, high–frequency inverters, a

P-CHANNEL MOS FET 5-PIN 2 CIRCUITS FOR SWITCHING

P-CHANNEL MOS FET (5-PIN 2 CIRCUITS) FOR SWITCHING The µPA573T is a super-mini-mold device provided with two MOS FET circuits. It achieves high-density mounting and saves mounting costs. FEATURES • Two source common MOS FET circuits in package the same size as SC-70 • Directly driven by ICs ha

OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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