ISO2-CMOS ST-BUS??FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit

Description The MT9171 (DSIC) and MT9172 (DNIC) are multifunction devices capable of providing high speed, full duplex digital transmission up to 160 kbit/s over a twisted wire pair. They use adaptive echo cancelling techniques and transfer data in (2B+D) format compatible to the ISDN basic rat

ISO2-CMOS ST-BUS FAMILY

Description The MT9171 (DSIC) and MT9172 (DNIC) are pin for pin compatible replacements for the MT8971 and MT8972, respectively. They are multi-function devices capable of providing high speed, full duplex digital transmission up to 160 kbit/s over a twisted wire pair. Features • Full duplex tr

Digital Subscriber Interface Circuit Digital Network Interface Circuit

文件：553.18 Kbytes Page：28 Pages

Digital Subscriber Interface Circuit Digital Network Interface Circuit

文件：553.18 Kbytes Page：28 Pages

封装/外壳：28-LCC（J 形引线） 功能：用户线路接口概念（SLIC） 包装：管件 描述：IC TELECOM INTERFACE 28PLCC 集成电路（IC） 电信

Digital Subscriber Interface Circuit Digital Network Interface Circuit

文件：553.18 Kbytes Page：28 Pages

封装/外壳：28-LCC（J 形引线） 功能：用户线路接口概念（SLIC） 包装：管件 描述：IC TELECOM INTERFACE 28PLCC 集成电路（IC） 电信

Digital Subscriber Interface Circuit Digital Network Interface Circuit

文件：553.18 Kbytes Page：28 Pages

ISO2-CMOS ST-BUS??FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit

Description The MT9171 (DSIC) and MT9172 (DNIC) are multifunction devices capable of providing high speed, full duplex digital transmission up to 160 kbit/s over a twisted wire pair. They use adaptive echo cancelling techniques and transfer data in (2B+D) format compatible to the ISDN basic rat

ISO2-CMOS ST-BUS??FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit

Description The MT9171 (DSIC) and MT9172 (DNIC) are multifunction devices capable of providing high speed, full duplex digital transmission up to 160 kbit/s over a twisted wire pair. They use adaptive echo cancelling techniques and transfer data in (2B+D) format compatible to the ISDN basic rat

Low Skew Output Buffer

General Description The AV9172 is designed to generate low skew clocks for clock distribution in high-performance PCs and workstations. It uses phase-locked loop technology to align the phase and frequency of the output clocks with an input reference clock. Because the input to output skew is gua

HIGH SPEED PLL WITH BUILT-IN PRESCALER

文件：869.61 Kbytes Page：22 Pages