QVL/DRL Plan

Chip for an All-Digital Telephone Answering Machine with Flash Memory Interface

GENERAL DESCRIPTION The D6571E chip is a digital speech/signal processing subsystem that implements all functions of TRUESPEECH® speech compression and voice prompts, telephone line signal processing, flash memory management and True FULL Duplex SpeakerPhone™ for an all digital answering machin

2.7 V to 5.5 V, I2C INTERFACE, VOLTAGE OUTPUT, 10-BIT DIGITAL-TO-ANALOG CONVERTER

FEATURES · Micropower Operation: 125 mA @ 3 V · Fast Update Rate: 188 kSPS · Power-On Reset to Zero · +2.7-V to +5.5-V Power Supply · Specified Monotonic by Design · I2C™ Interface up to 3.4 MBPS · On-Chip Output Buffer Amplifier, Rail-to-Rail Operation · Double-Buffered Input Register ·

USB 2.0 full speed-compliant

文件：1.5846 Mbytes Page：63 Pages

2.7 V to 5.5 V, I2C INTERFACE, VOLTAGE OUTPUT, 10-BIT DIGITAL-TO-ANALOG CONVERTER

文件：524.19 Kbytes Page：22 Pages

INTERFACE, VOLTAGE OUTPUT, 10-BIT DIGITAL-TO-ANALOG CONVERTER

文件：732.21 Kbytes Page：25 Pages