EDO DRAM

GENERAL DESCRIPTION The 1 Meg x 16 is a randomly accessed, solid-state memory containing 16,777,216 bits organized in a x16 configuration. FEATURES • JEDEC- and industry-standard x16 timing, functions, pinouts, and packages • High-performance CMOS silicon-gate process • Single power supply (+

EDO DRAM

EDO DRAM

GENERAL DESCRIPTION The 1 Meg x 16 is a randomly accessed, solid-state memory containing 16,777,216 bits organized in a x16 configuration. FEATURES • JEDEC- and industry-standard x16 timing, functions, pinouts, and packages • High-performance CMOS silicon-gate process • Single power supply (+

EDO DRAM

GENERAL DESCRIPTION The 1 Meg x 16 is a randomly accessed, solid-state memory containing 16,777,216 bits organized in a x16 configuration. FEATURES • JEDEC- and industry-standard x16 timing, functions, pinouts, and packages • High-performance CMOS silicon-gate process • Single power supply (+

EDO DRAM

GENERAL DESCRIPTION The 1 Meg x 16 is a randomly accessed, solid-state memory containing 16,777,216 bits organized in a x16 configuration. FEATURES • JEDEC- and industry-standard x16 timing, functions, pinouts, and packages • High-performance CMOS silicon-gate process • Single power supply (+

EDO DRAM

GENERAL DESCRIPTION The 1 Meg x 16 is a randomly accessed, solid-state memory containing 16,777,216 bits organized in a x16 configuration. FEATURES • JEDEC- and industry-standard x16 timing, functions, pinouts, and packages • High-performance CMOS silicon-gate process • Single power supply (+

5V 1M횞16 CMOS DRAM (EDO)

Functional description The AS4C1M16E5 is a high performance 16-megabit CMOS Dynamic Random Access Memory (DRAM) organized as 1,048,576 words × 16 bits. The device is fabricated using advanced CMOS technology and innovative design techniques resulting in high speed, extremely low power and wide op