2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

GENERAL DESCRIPTION The MSM81C55-5 has a 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It uses silicon gate CMOS technology and consumes a standby current of 100 micro ampere, maximum, while the chip is not selected. Featureing a maximum access time of 400 ns, the MSM81C

2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

GENERAL DESCRIPTION The MSM81C55-5 has a 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It uses silicon gate CMOS technology and consumes a standby current of 100 micro ampere, maximum, while the chip is not selected. Featureing a maximum access time of 400 ns, the MSM81C

2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

GENERAL DESCRIPTION The MSM81C55-5 has a 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It uses silicon gate CMOS technology and consumes a standby current of 100 micro ampere, maximum, while the chip is not selected. Featureing a maximum access time of 400 ns, the MSM81C

2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

GENERAL DESCRIPTION The MSM81C55-5 has a 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It uses silicon gate CMOS technology and consumes a standby current of 100 micro ampere, maximum, while the chip is not selected. Featureing a maximum access time of 400 ns, the MSM81C

Radiation Hardened 256 x 8 CMOS RAM

The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened Self Aligned Junction Isolated (SAJI) silicon gate technology. Latch-up free operation is achieved by the use of epitaxial starting material to eliminate the parasitic SCR effect seen in con

Radiation Hardened 256 x 8 CMOS RAM

The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened Self Aligned Junction Isolated (SAJI) silicon gate technology. Latch-up free operation is achieved by the use of epitaxial starting material to eliminate the parasitic SCR effect seen in con

Radiation Hardened 256 x 8 CMOS RAM

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