Dual FIFO (262,214 Words 횞 8 Bits) 횞 2

GENERAL DESCRIPTION The MS81V04166 is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories is connected in common, and

Dual FIFO (262,214 Words 횞 8 Bits) 횞 2

GENERAL DESCRIPTION The MS81V04166 is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories is connected in common, and

Dual FIFO (262,214 Words 횞 8 Bits) 횞 2

GENERAL DESCRIPTION The MS81V04166A is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories isconnected in common, and th

Dual FIFO (262,214 Words 횞 8 Bits) 횞 2

GENERAL DESCRIPTION The MS81V04166A is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories isconnected in common, and th

Dual FIFO (262,214 Words 횞 8 Bits) 횞 2

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