Low Voltage PLL Intelligent Dynamic Clock (IDCS) Switch

The MPC9893 is a 2.5V and 3.3V compatible, PLL based intelligent dynamic clock switch and generator specifically designed for redundant clock distribution systems. The device receives two LVCMOS clock signals and generates 12 phase aligned output clocks. The MPC9893 is able to detect a failing ref

3.3V 1:12 LVCMOS PLL Clock Generator

Features • 12-output LVCMOS PLL clock generator • 2.5 V and 3.3 V compatible • IDCS - on-chip intelligent dynamic clock switch • Automatically detects clock failure • Smooth output phase transition during clock failover switch • 7.5 – 200 MHz output frequency range • LVCMOS compatible input

3.3V, 1:12 LVCMOS PLL CLOCK GENERATOR

The MPC9893 is a 2.5 V and 3.3 V compatible, PLL based intelligent dynamic clock switch and generator specifically designed for redundant clock distribution systems. The device receives two LVCMOS clock signals and generates 12 phase aligned output clocks. The MPC9893 is able to detect a failing ref 12-output LVCMOS PLL clock generator\n2.5 V and 3.3 V compatible\nIDCS - on-chip intelligent dynamic clock switch\nAutomatically detects clock failure\nSmooth output phase transition during clock failover switch\n7.5 – 200 MHz output frequency range\nLVCMOS compatible inputs and outputs\nExternal fe;

封装/外壳：48-LQFP 包装：散装 描述：IC PLL/IDCS CLK GENERATOR 48LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：48-LQFP 包装：卷带（TR） 描述：IC PLL CLK GEN 1:12 3.3V 48-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

Silicon Monolithic Integrated Circuit

FUNCTION 1．1ch control with Push-Pull 2．Lamp current and voltage sense feed back control 3．Sequencing easily achieved with Soft Start Control 4．Short circuit protection with Timer Latch 5．Under Voltage Lock Out 6．Short circuit protection with over voltage 7．Mode-selectable the

Evaluation Board User?셲 Guide

文件：8.27754 Mbytes Page：32 Pages

Evaluation Board User?셲 Guide

文件：8.27754 Mbytes Page：32 Pages

4M-bit Serial Voice Flash Memory

文件：146.68 Kbytes Page：9 Pages