Quad D-Type Flip-Flop With Clear

General Description The MM74HC175 high speed D-type flip-flop with comple mentary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS-TTL loads. Informa

Quad D-Type Flip-Flop With Clear

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封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE SNGL 4BIT 16TSSOP 集成电路（IC） 触发器

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 功能：主复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 4BIT 16TSSOP 集成电路（IC） 触发器

Quad D Flip-Flop with Common Clock and Reset

Quad D Flip−Flop with Common Clock and Reset High–Performance Silicon–Gate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Output Drive Capability:

Quad D Flip-Flop with Common Clock and Reset

Quad D Flip−Flop with Common Clock and Reset High–Performance Silicon–Gate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Output Drive Capability:

Quad D Flip-Flop with Common Clock and Reset

Quad D Flip−Flop with Common Clock and Reset High–Performance Silicon–Gate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Output Drive Capability:

Quad D Flip-Flop with Common Clock and Reset

文件：200.41 Kbytes Page：7 Pages

Quad D Flip-Flop with Common Clock and Reset

文件：200.41 Kbytes Page：7 Pages