Quad 2-Input NAND Gate . Quad 2-Input NOR Gate . Hex Inverter

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate . Quad 2-Input NOR Gate . Hex Inverter

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate . Quad 2-Input NOR Gate . Hex Inverter

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate . Quad 2-Input NOR Gate . Hex Inverter

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate . Quad 2-Input NOR Gate . Hex Inverter

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate . Quad 2-Input NOR Gate . Hex Inverter

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate . Quad 2-Input NOR Gate . Hex Inverter

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate . Quad 2-Input NOR Gate . Hex Inverter

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input NAND Gate

General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to id

Quad 2-Input AND Gate

General Description The MM74C08 employs complementary MOS (CMOS) transistors to achieve wide power supply operating range, low power consumption and high noise margin, these gates provide basic functions used in the implementation of digital integrated circuit systems. The N- and P-channel enhanc

Quad 2-Input AND Gate

General Description The MM74C08 employs complementary MOS (CMOS) transistors to achieve wide power supply operating range, low power consumption and high noise margin, these gates provide basic functions used in the implementation of digital integrated circuit systems. The N- and P-channel enhanc

Hex Schmitt Trigger

General Description The MM74C14 Hex Schmitt Trigger is a monolithic comple mentary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The positive and negative going threshold voltages VT+ and VT−, show low variation with respect to temperature (typ. 0.0005

CMOS High Voltage Logic

Hex Schmitt Trigger Inverter in bare die form Description The MM74C14 Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N-channel and P-channel enhancement transistors. The positive and negative going threshold voltages, VT+ and VT- , show low

Hex Schmitt Trigger

General Description The MM74C14 Hex Schmitt Trigger is a monolithic comple mentary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The positive and negative going threshold voltages VT+ and VT−, show low variation with respect to temperature (typ. 0.0005

CMOS High Voltage Logic

Features Wide supply voltage range: 3V to 15V High noise immunity: 0.70 VCC (typ.) Low power TTL compatibility: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed) Hysteresis: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed).

CMOS High Voltage Logic

Features Wide supply voltage range: 3V to 15V High noise immunity: 0.70 VCC (typ.) Low power TTL compatibility: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed) Hysteresis: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed).

CMOS High Voltage Logic

Hex Sch mitt Trigger Inverter in Ceramic Dual-In-Line Package (CDIP) Description The MM74C14J Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N-channel and P-channel enhancement transistors. The positive and negative going threshold voltages,

CMOS High Voltage Logic

Features Wide supply voltage range: 3V to 15V High noise immunity: 0.70 VCC (typ.) Low power TTL compatibility: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed) Hysteresis: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed).

CMOS High Voltage Logic

Features Wide supply voltage range: 3V to 15V High noise immunity: 0.70 VCC (typ.) Low power TTL compatibility: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed) Hysteresis: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed).

Hex Schmitt Trigger

General Description The MM74C14 Hex Schmitt Trigger is a monolithic comple mentary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The positive and negative going threshold voltages VT+ and VT−, show low variation with respect to temperature (typ. 0.0005

Hex Schmitt Trigger

General Description The MM74C14 Hex Schmitt Trigger is a monolithic comple mentary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The positive and negative going threshold voltages VT+ and VT−, show low variation with respect to temperature (typ. 0.0005

CMOS High Voltage Logic

Hex Sch mitt Trigger Inverter in Plastic Small-Outline Package (SOIC) Description The MM74C14M Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N-channel and P-channel enhancement transistors. The positive and negative going threshold voltages

CMOS High Voltage Logic

Features Wide supply voltage range: 3V to 15V High noise immunity: 0.70 VCC (typ.) Low power TTL compatibility: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed) Hysteresis: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed).

CMOS High Voltage Logic

Features Wide supply voltage range: 3V to 15V High noise immunity: 0.70 VCC (typ.) Low power TTL compatibility: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed) Hysteresis: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed).

Hex Schmitt Trigger

General Description The MM74C14 Hex Schmitt Trigger is a monolithic comple mentary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The positive and negative going threshold voltages VT+ and VT−, show low variation with respect to temperature (typ. 0.0005

Hex Schmitt Trigger

General Description The MM74C14 Hex Schmitt Trigger is a monolithic comple mentary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The positive and negative going threshold voltages VT+ and VT−, show low variation with respect to temperature (typ. 0.0005

Hex Schmitt Trigger

General Description The MM74C14 Hex Schmitt Trigger is a monolithic comple mentary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The positive and negative going threshold voltages VT+ and VT−, show low variation with respect to temperature (typ. 0.0005

CMOS High Voltage Logic

Hex Sch mitt Trigger Inverter in Plastic Dual-In-Line Package (PDIP) Description The MM74C14N Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N-channel and P-channel enhancement transistors. The positive and negative going threshold voltages,

CMOS High Voltage Logic

Features Wide supply voltage range: 3V to 15V High noise immunity: 0.70 VCC (typ.) Low power TTL compatibility: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed) Hysteresis: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed).

CMOS High Voltage Logic

Features Wide supply voltage range: 3V to 15V High noise immunity: 0.70 VCC (typ.) Low power TTL compatibility: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed) Hysteresis: o 0.40 VCC (typ.) o 0.20 VCC (guaranteed).

16-Line to 1-Line Multiplexer 3-STATE . 16-Line to 1-Line Multiplexer

General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines the particular 1-of-16 inputs which is routed to the output. The data is inverted from input to output. A strobe override places the output of MM74C150 in the logical “1” state and

16-Line to 1-Line Multiplexer 3-STATE . 16-Line to 1-Line Multiplexer

General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines the particular 1-of-16 inputs which is routed to the output. The data is inverted from input to output. A strobe override places the output of MM74C150 in the logical “1” state and

4-Line to 16-Line Decoder/Demultiplexer

General Description The MM74C154 one of sixteen decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The device is provided with two strobe inputs, both of which must be in the logical “0” state for normal operation. If eit

4-Line to 16-Line Decoder/Demultiplexer

General Description The MM74C154 one of sixteen decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The device is provided with two strobe inputs, both of which must be in the logical “0” state for normal operation. If eit

4-Line to 16-Line Decoder/Demultiplexer

General Description The MM74C154 one of sixteen decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The device is provided with two strobe inputs, both of which must be in the logical “0” state for normal operation. If eit

Quad 2-Input Multiplexers

General Description The MM74C157 multiplexers are monolithic complementary MOS (CMOS) integrated circuits constructed with N and P-channel enhancement transistors. They consist of four 2-input multiplexers with common select and enable inputs. When the enable input is at logical “0” the four ou

Quad 2-Input Multiplexers

General Description The MM74C157 multiplexers are monolithic complementary MOS (CMOS) integrated circuits constructed with N and P-channel enhancement transistors. They consist of four 2-input multiplexers with common select and enable inputs. When the enable input is at logical “0” the four ou

8-Bit Parallel-Out Serial Shift Register

General Description The MM74C164 shift registers are a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. These 8-bit shift registers have gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. A high-lev

8-Bit Parallel-Out Serial Shift Register

General Description The MM74C164 shift registers are a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. These 8-bit shift registers have gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. A high-lev

8-Bit Parallel-Out Serial Shift Register

General Description The MM74C164 shift registers are a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. These 8-bit shift registers have gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. A high-lev

Parallel-Load 8-Bit Shift Register

General Description The MM74C165 functions as an 8-bit parallel-load, serial shift register. Data is loaded into the register independent of the state of the clock(s) when PARALLEL LOAD (PL) is low. Shifting is inhibited as long as PL is low. Data is sequentially shifted from complementary output

Parallel-Load 8-Bit Shift Register

General Description The MM74C165 functions as an 8-bit parallel-load, serial shift register. Data is loaded into the register independent of the state of the clock(s) when PARALLEL LOAD (PL) is low. Shifting is inhibited as long as PL is low. Data is sequentially shifted from complementary output

Hex D-Type Flip-Flop

General Description The MM74C174 hex D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. All have a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outpu

Hex D-Type Flip-Flop

General Description The MM74C174 hex D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. All have a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outpu

Hex D-Type Flip-Flop

General Description The MM74C174 hex D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. All have a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outpu

Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

Quad D-Type Flip-Flop

General Description The CD40174BC consists of six positive-edge triggered D type flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positive edge triggered D-type flip-flops; both the true and comple ment outputs from each flip-flop are exter

Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter

General Description The MM74C192 and MM74C193 up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The MM74C192 is a BCD counter, while the MM74C193 is a binary counter. Counting up and counting down is performed by two count inputs, one being held high while the oth

Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter

General Description The MM74C192 and MM74C193 up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The MM74C192 is a BCD counter, while the MM74C193 is a binary counter. Counting up and counting down is performed by two count inputs, one being held high while the oth

Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter

General Description The MM74C192 and MM74C193 up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The MM74C192 is a BCD counter, while the MM74C193 is a binary counter. Counting up and counting down is performed by two count inputs, one being held high while the oth

Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter

General Description The MM74C192 and MM74C193 up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The MM74C192 is a BCD counter, while the MM74C193 is a binary counter. Counting up and counting down is performed by two count inputs, one being held high while the oth

TRANSISTOR TRANSISTOR LOGIC