Analog to Digital Converter IC SAR type analog-to-digital converter IC

MM4027A12 is a high-performance 12bit sophisticated successive approximation analog-to-digital converter IC supporting pseudo-differential inputs.Simultaneous sampling of differential signals through two channels is available.The maximum data sampling rate is 750ksps, controlled by an external clock ① Power supply for analog: 5 V/Power supply for digital: 1.8 to 5 V\n② 12bit successive approximation ADC\n③ Simultaneous sampling and conversion through two channels\n④ Two channels of pseudo-differential analog input\n⑤ Sampling rate: 750ksps at the maximum\n⑥ Use of external reference voltage\n⑦ ;

Analog to Digital Converter IC SAR type analog-to-digital converter IC

MM4027A14 is a high-performance 14bit sophisticated successive approximation analog-to-digital converter IC supporting pseudo-differential inputs.Simultaneous sampling of differential signals through two channels is available.The maximum data sampling rate is 750ksps, controlled by an external clock ① Power supply for analog: 5 V/Power supply for digital: 1.8 to 5 V\n② 14bit successive approximation ADC\n③ Simultaneous sampling and conversion through two channels\n④ Two channels of pseudo-differential analog input\n⑤ Sampling rate: 750ksps at the maximum\n⑥ Use of external reference voltage\n⑦ ;

Dual JK flip-flop

DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as

Dual JK flip-flop

DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as

Dual JK flip-flop

DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as

Silicon planar type

Silicon planar type For stabilization of power supply ■ Features • High reliability, achieved by the DHD structure • Allowing to insert to a 5 mm pitch hole • Finely divided zener-voltage rank • Sharp rising performance • Wide voltage range: VZ = 2.0 V to 39 V

Silicon planar type

Silicon planar type For stabilization of power supply ■ Features • High reliability, achieved by the DHD structure • Allowing to insert to a 5 mm pitch hole • Finely divided zener-voltage rank • Sharp rising performance • Wide voltage range: VZ = 2.0 V to 39 V

Dual JK flip-flop

DUAL-J-K MASTER-SLAVE FLIP-FLOP

CMOS DUAL J-K MASTER-SLAVER FLIP-FLOP

CMOS DUAL J-K MASTER-SLAVER FLIP-FLOP

CMOS Dual J-K Master-Slave Flip-Flop

CMOS DUAL J-K MASTER-SLAVER FLIP-FLOP

CMOS Dual J-K Master-Slave Flip-Flop

CMOS Dual J-K Master-Slave Flip-Flop

CMOS DUAL J-K MASTER-SLAVER FLIP-FLOP

DUAL-J-K MASTER-SLAVE FLIP-FLOP

Dual J-K Flip Flop

Dual JK flip-flop

Dual JK flip-flop

Dual JK flip-flop

Dual J-K Flip-Flop

Dual J-K Flip-Flop

Dual J-K Flip-Flop

Dual J−K Flip−Flop

COMPLEMENTARY METAL OXIDE SILICON

DUAL D TYPE FUP FLOP

DUAL J-K MASTER-SLAVE FLIP FLOP

DUAL J-K MASTER-SLAVE FLIP FLOP

Dual J-K Master-Slave Flip Flop