VCXO and Set-Top Clock Source

Description The MK2772-01 is a low cost, low jitter, high performance VCXO and clock synthesizer for settop boxes. The on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3V input voltage to cause the output clocks to vary by ±100 ppm. Using MicroClock’s patented VCXO and analog Phase-Lo

VCXO and Set-Top Clock Source

Features • Packaged in 20 pin SOIC (Pb free available) • Uses an inexpensive 13.5 MHz crystal • On-chip VCXO (patented) with pull range of 200ppm (minimum) • Ability to switch input sources “on-the-fly” • VCXO tuning voltage of 0 to 3V • Zero ppm synthesis error (patented) in all clocks. A

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC CLK SRC VCXO/SET-TOP 20-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

VCXO and Set-Top Clock Source

VCXO and Set-Top Clock Source

Features • Packaged in 20 pin SOIC (Pb free available) • Uses an inexpensive 13.5 MHz crystal • On-chip VCXO (patented) with pull range of 200ppm (minimum) • Ability to switch input sources “on-the-fly” • VCXO tuning voltage of 0 to 3V • Zero ppm synthesis error (patented) in all clocks. A

VCXO and Set-Top Clock Source

Description The MK2772-01 is a low cost, low jitter, high performance VCXO and clock synthesizer for settop boxes. The on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3V input voltage to cause the output clocks to vary by ±100 ppm. Using MicroClock’s patented VCXO and analog Phase-Lo

VCXO and Set-Top Clock Source

Description The MK2772-01 is a low cost, low jitter, high performance VCXO and clock synthesizer for settop boxes. The on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3V input voltage to cause the output clocks to vary by ±100 ppm. Using MicroClock’s patented VCXO and analog Phase-Lo

VCXO and Set-Top Clock Source

Features • Packaged in 20 pin SOIC (Pb free available) • Uses an inexpensive 13.5 MHz crystal • On-chip VCXO (patented) with pull range of 200ppm (minimum) • Ability to switch input sources “on-the-fly” • VCXO tuning voltage of 0 to 3V • Zero ppm synthesis error (patented) in all clocks. A

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC CLK SRC VCXO/SET-TOP 20-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器