VCXO-BASED UNIVERSAL CLOCK TRANSLATOR

Features • Input clock frequency

VCXO-Based Universal Clock Translator

The MK2069-04 is a VCXO (Voltage Controlled Crystal Oscillator) based clock generator that features a PLL (Phase-Locked Loop) input reference divider and feedback divider that have a wide numeric range selectable by the user. This enables a complex PLL multiplication ratio that can be used for trans Input clock frequency 1 kHz to 170 MHz\nOutput clock frequency of 500 kHz to 160 MHz\nClock translation examples: T1 (1.544 MHz) to/from E1 (2.048 MHz) T3 (44.736 MHz) to/from E3 (34.368 MHz) OC-3 (155.52 MHz) to/from T1 (1.544 MHz) CCIR-601 (27 MHz) to/from SMPTE 274M (74.125 MHz)\nJitter attenuati;

VCXO-Based Universal Clock Translator

文件：355.06 Kbytes Page：19 Pages

丝印代码：MK2069-04GILF；VCXO-BASED UNIVERSAL CLOCK TRANSLATOR

Features • Input clock frequency

丝印代码：MK2069-04GILF；VCXO-BASED UNIVERSAL CLOCK TRANSLATOR

Features • Input clock frequency

VCXO-Based Universal Clock Translator

文件：355.06 Kbytes Page：19 Pages

IC VCXO CLK TRANSLATOR 56-TSSOP

封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR） 描述：IC VCXO CLK TRANSLATOR 56-TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

VCXO-Based Universal Clock Translator

文件：355.06 Kbytes Page：19 Pages

封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR） 描述：IC VCXO CLK TRANSLATOR 56-TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

VCXO-Based Universal Clock Translator