Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer with Open Drain Output

The MC74VHC1G07 / MC74VHC1GT07 is a single non−inverting buffer with open drain output in tiny footprint packages. The MC74VHC1G07 has CMOS−level input thresholds while the MC74VHC1GT07 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are appli

Single Non-Inverting Buffer

文件：206.76 Kbytes Page：14 Pages

Single Non-Inverting Buffer

文件：206.76 Kbytes Page：14 Pages

Single Non-Inverting Buffer

文件：206.76 Kbytes Page：14 Pages

Single Non-Inverting Buffer

文件：206.76 Kbytes Page：14 Pages

Single Non-Inverting Buffer

文件：206.76 Kbytes Page：14 Pages

Single Non-Inverting Buffer

文件：206.76 Kbytes Page：14 Pages

Single Non-Inverting Buffer

文件：206.76 Kbytes Page：14 Pages

Single Non-Inverting Buffer

文件：206.76 Kbytes Page：14 Pages

Noninverting Buffer withOpen Drain Output with LSTTL-Compatible Inputs

Noninverting Buffer withOpen Drain Output with LSTTL–Compatible Inputs The L74VHC1G07 is an advanced high speed CMOS buffer with open drain output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low p

nullSingle Non-Inverting Buffer with Open Drain Output

Features  Designed for 2.0 V to 5.5 V VCC Operation  3.5 ns tPD at 5 V (typ)  Inputs/Outputs Over−Voltage Tolerant up to 5.5 V  IOFF Supports Partial Power Down Protection  Source/Sink 8 mA at 3.0 V  Available in SC−88A and TSOP−5 Packages  Chip Complexity