Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs

Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT374A may be used as a level converter for interfacing TTL or NMOS outputs to High−Speed CMOS inputs. The HCT374A is identical in pinout to the LS374. Data meeting the setup and hold

Octal 3?뭆tate Noninverting D Flip?묯lop with LSTTL?묬ompatible Inputs

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封装/外壳：20-DIP（0.300"，7.62mm） 功能：标准 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 8BIT 20DIP 集成电路（IC） 触发器

封装/外壳：20-DIP（0.300"，7.62mm） 功能：标准 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 8BIT 20DIP 集成电路（IC） 触发器

Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs

文件：155.26 Kbytes Page：8 Pages

Octal 3?뭆tate Noninverting D Flip?묯lop with LSTTL?묬ompatible Inputs

文件：116.76 Kbytes Page：8 Pages

Octal D-type flip-flop; positive edge-trigger; 3-state

1. General description The 74HC374; 74HCT374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirement

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive,

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive,

Octal D-type flip-flop; positive edge-trigger; 3-state

1. General description The 74HC374; 74HCT374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirement

OCTAL D-TYPE FLIP-FLOP POSITIVE EDGE TRIGGER 3-STATE

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