12?뭆tage Binary Ripple Counter High?뭁erformance Silicon?묰ate CMOS

The MC74C4040A is identical in pinout to the standard CMOS MC14040. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of 12 master−slave flip−flops. The output of each flip−flop feeds the next and the

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC COUNTER 12STAGE BIN 16-SOEIAJ 集成电路（IC） 计数器，除法器

12-stage binary ripple counter

1. General description The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stage

12-stage binary ripple counter

General description The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4040B series. They are specified in compliance with JEDEC standard no. 7A. The 74HC4040; 74HCT4040 are 12-stage binary ripple counters with a clock input (CP), an overriding asynchr

12-stage binary ripple counter

General description The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4040B series. They are specified in compliance with JEDEC standard no. 7A. The 74HC4040; 74HCT4040 are 12-stage binary ripple counters with a clock input (CP), an overriding asynchr

12-stage binary ripple counter

1. General description The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stage

12-stage binary ripple counter

General description The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4040B series. They are specified in compliance with JEDEC standard no. 7A. The 74HC4040; 74HCT4040 are 12-stage binary ripple counters with a clock input (CP), an overriding asynchr