Octal 3?뭆tate Non?묲nverting D Flip?묯lop High?뭁erformance Silicon?묰ate CMOS

文件：138.36 Kbytes Page：10 Pages

Octal 3?뭆tate Non?묲nverting D Flip?묯lop High?뭁erformance Silicon?묰ate CMOS

文件：138.36 Kbytes Page：10 Pages

Octal 3?뭆tate Non?묲nverting D Flip?묯lop High?뭁erformance Silicon?묰ate CMOS

文件：138.36 Kbytes Page：10 Pages

Octal 3-State Non-Inverting D Flip-Flop

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Octal 3-State Non-Inverting D Flip-Flop

文件：149.05 Kbytes Page：9 Pages

Octal 3?뭆tate Non?묲nverting D Flip?묯lop High?뭁erformance Silicon?묰ate CMOS

文件：138.36 Kbytes Page：10 Pages

封装/外壳：20-SOIC（0.209"，5.30mm 宽） 功能：标准 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 8BIT 20SOEIAJ 集成电路（IC） 触发器

Octal D-type flip-flop; positive edge-trigger; 3-state

1. General description The 74HC374; 74HCT374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirement

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive,

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive,

OCTAL D-TYPE FLIP-FLOP POSITIVE EDGE TRIGGER 3-STATE

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Octal 3?뭆tate Non?묲nverting D Flip?묯lop

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