4-bit parallel access shift register

GENERAL DESCRIPTION The 74HC/HCT195 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Asynchronous master reset • J,K, (D) inputs to the first stage • Fully syn

8 BIT PIPO SHIFT REGISTER

DESCRIPTION The M54/74HC195 is a high speed CMOS 4 BIT PIPO SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 13 ns (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA

High Speed CMOS Logic 4-Bit Parallel Access Register

文件：42.23 Kbytes Page：6 Pages

High Speed CMOS Logic 4-Bit Parallel Access Register

文件：42.23 Kbytes Page：6 Pages

High Speed CMOS Logic 4-Bit Parallel Access Register

文件：42.23 Kbytes Page：6 Pages