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MC74AC74价格

参考价格:¥0.6865

型号:MC74AC74DG 品牌:ON 备注:这里有MC74AC74多少钱,2026年最近7天走势,今日出价,今日竞价,MC74AC74批发/采购报价,MC74AC74行情走势销售排行榜,MC74AC74报价。
型号 功能描述 生产厂家 企业 LOGO 操作
MC74AC74

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

MC74AC74

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly

MOTOROLA

摩托罗拉

MC74AC74

双 D 触发器正向边触发器

The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clearand Set inputs and complementary (Q,Q) outputs. Information at the input istransferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly rela • Outputs Source/Sink 24 mA\n• ACT74 Has TTL Compatible Inputs CD1SD2 D1Q1CP2Q2\n• Pb-Free Packages Are Available;

ONSEMI

安森美半导体

MC74AC74

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

ETC

知名厂家

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly

MOTOROLA

摩托罗拉

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly

MOTOROLA

摩托罗拉

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

ONSEMI

安森美半导体

Dual D-Type Positive Edge-Triggered Flip-Flop

文件:102.76 Kbytes Page:10 Pages

ONSEMI

安森美半导体

Dual D-Type Positive Edge-Triggered Flip-Flop

文件:102.76 Kbytes Page:10 Pages

ONSEMI

安森美半导体

Dual D-Type Positive Edge-Triggered Flip-Flop

文件:102.76 Kbytes Page:10 Pages

ONSEMI

安森美半导体

封装/外壳:14-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC FF D-TYPE DUAL 1BIT 14SOIC 集成电路(IC) 触发器

ONSEMI

安森美半导体

封装/外壳:14-TSSOP(0.173",4.40mm 宽) 功能:设置(预设)和复位 包装:卷带(TR) 描述:IC FF D-TYPE DUAL 1BIT 14TSSOP 集成电路(IC) 触发器

ONSEMI

安森美半导体

Dual D-Type Positive Edge-Triggered Flip-Flop

文件:102.76 Kbytes Page:10 Pages

ONSEMI

安森美半导体

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

文件:97.56 Kbytes Page:11 Pages

STMICROELECTRONICS

意法半导体

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

文件:97.56 Kbytes Page:11 Pages

STMICROELECTRONICS

意法半导体

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

文件:97.56 Kbytes Page:11 Pages

STMICROELECTRONICS

意法半导体

Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered

文件:36.2 Kbytes Page:8 Pages

TI

德州仪器

Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered

文件:36.2 Kbytes Page:8 Pages

TI

德州仪器

MC74AC74产品属性

  • 类型

    描述

  • Pb-free:

    Pb

  • AEC Qualified:

    A

  • Halide free:

    H

  • PPAP Capablee:

    P

  • Status:

    Active

  • Type:

    D-Type

  • Channels:

    2

  • VCC Min (V):

    2

  • VCC Max (V):

    6

  • tpd Max (ns):

    9.5

  • IO Max (mA):

    24

  • Package Type:

    SOIC-14

更新时间:2026-8-2 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ON(安森美)
24+
标准封装
7698
全新原装正品/价格优惠/质量保障
ON/安森美
26+
SOP
20000
公司只有正品,实单来谈
ONS
25+23+
TSSOP14
22013
绝对原装正品全新进口深圳现货
ON/安森美
21+
SOIC-14
8080
只做原装,质量保证
MOT
25+
15
公司优势库存 热卖中!!
MOTOROLA/摩托罗拉
2402+
SOP
8324
原装正品!实单价优!
24+
3000
公司现货
MOT
23+
DIP14
5000
原装正品,假一罚十
ON
26+
SMD
55
全新正品现货供应特价库存
ON(安森美)
23+
标准封装
5000
原厂原装现货订货价格优势终端BOM表可配单提供样品

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