四路 2 输入 NAND 门极

The UB Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. The UB set of CMOS gates are inverting non-buffered functions. • Supply Voltage Range = 3.0 Vdc to 18 Vdc\n• Linear and Oscillator Applications\n• Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range\n• Double Diode Protection on All Inputs\n• Pin-for-Pin Replacements for Corresponding CD4000 Series UB S;

UB-Suffix Series CMOS Gates

The UB Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. The UB set of CMOS gates are inverting non−buffered functions.

UB-Suffix Series CMOS Gates

The UB Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. The UB set of CMOS gates are inverting non−buffered functions.

UB-Suffix Series CMOS Gates

The UB Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. The UB set of CMOS gates are inverting non−buffered functions.

UB-Suffix Series CMOS Gates

The UB Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. The UB set of CMOS gates are inverting non−buffered functions.

UB-Suffix Series CMOS Gates

The UB Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. The UB set of CMOS gates are inverting non−buffered functions.

UB-Suffix Series CMOS Gates

The UB Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. The UB set of CMOS gates are inverting non−buffered functions.

UB?뭆uffix Series CMOS Gates

文件：147.04 Kbytes Page：7 Pages

UB-Suffix Series CMOS Gates

文件：194.06 Kbytes Page：7 Pages

UB?뭆uffix Series CMOS Gates

文件：147.04 Kbytes Page：7 Pages

封装/外壳：14-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE NAND 4CH 2-INP 14DIP 集成电路（IC） 门和反相器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE NAND 4CH 2-INP 14SOIC 集成电路（IC） 门和反相器

UB?뭆uffix Series CMOS Gates

文件：147.04 Kbytes Page：7 Pages

UB?뭆uffix Series CMOS Gates

文件：147.04 Kbytes Page：7 Pages

UB-Suffix Series CMOS Gates

文件：194.06 Kbytes Page：7 Pages

UB-Suffix Series CMOS Gates

文件：144.39 Kbytes Page：6 Pages

UB?뭆uffix Series CMOS Gates

文件：147.04 Kbytes Page：7 Pages

UB-Suffix Series CMOS Gates

文件：194.06 Kbytes Page：7 Pages

UB?뭆uffix Series CMOS Gates

文件：147.04 Kbytes Page：7 Pages

UB-Suffix Series CMOS Gates

文件：144.39 Kbytes Page：6 Pages

B-Suffix Series CMOS Gates

B-Suffix Series CMOS Gates The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. Features • Supply Voltage Range = 3.0 V

B-Suffix Series CMOS Gates

B-Suffix Series CMOS Gates The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. Features • Supply Voltage Range = 3.0 V