92-Bit Parity Geverator/Checker

9+2-Bit Parity Generator/Checker The MC10170 is a 11–bit parity circuit, which is segmented into 9 data bits and 2 control bits. Output A generates odd parity on 9 bits; that is, Output A goes high for an odd number of high logic levels on the bit inputs in only 2 gate delays. The Control Input

Dual Binary to 1-4 Decoder(Low)

The MC10171 is a binary coded 2 line to dual 4 line decoder with selected outputs low. With either E0 or E1 high, the corresponding selected 4 outputs are high. The common enable E, when high, forces all outputs high. • PD = 325 mW typ/pkg (No Load) • tpd = 4.0 ns typ • tr, tf = 2.0 ns typ

Dual Binary to 1-4 Decoder(Low)

The MC10171 is a binary coded 2 line to dual 4 line decoder with selected outputs low. With either E0 or E1 high, the corresponding selected 4 outputs are high. The common enable E, when high, forces all outputs high. • PD = 325 mW typ/pkg (No Load) • tpd = 4.0 ns typ • tr, tf = 2.0 ns typ

Dual Binary to 1-4 Decoder(Low)

The MC10171 is a binary coded 2 line to dual 4 line decoder with selected outputs low. With either E0 or E1 high, the corresponding selected 4 outputs are high. The common enable E, when high, forces all outputs high. • PD = 325 mW typ/pkg (No Load) • tpd = 4.0 ns typ • tr, tf = 2.0 ns typ

Dual Binary to 1-4 Decoder(Low)

The MC10171 is a binary coded 2 line to dual 4 line decoder with selected outputs low. With either E0 or E1 high, the corresponding selected 4 outputs are high. The common enable E, when high, forces all outputs high. • PD = 325 mW typ/pkg (No Load) • tpd = 4.0 ns typ • tr, tf = 2.0 ns typ

Dual Binary to 1-4 Decoder(High)

The MC10172 is a binary-coded 2 line to dual 4 line decoder with selected outputs high. With either E0 or E1 low, the corresponding selected 4 outputs are low. The common enable E, when high, forces all outputs low. PD = 325 mW typ/pkg (No Load) tpd = 4.0 ns typ tr, tf = 2.0 ns typ

Quad 2-Input Multiplexer/Latch

Quad 2-Input Multiplexer/Latch The MC10173 is a quad two channel multiplexer with latch. It incorporates common clock and common data select inputs. The select input determines which data input is enabled. A high (H) level enables data inputs D00, D10, D20, and D30 and a low (L) level enables dat

Dual 4 to 1 Multiplexer

The MC10174 is a high speed dual channel multiplexer with output enable capability. The select inputs determine one of four active data inputs for each multiplexer. An output enable forces both outputs low when in the high state. • PD = 305 mW typ/pkg (No Load) • tpd = 3.5 ns typ (Dta to ou

Dual 4 to 1 Multiplexer

The MC10174 is a high speed dual channel multiplexer with output enable capability. The select inputs determine one of four active data inputs for each multiplexer. An output enable forces both outputs low when in the high state. • PD = 305 mW typ/pkg (No Load) • tpd = 3.5 ns typ (Dta to ou

Dual 4 to 1 Multiplexer

The MC10174 is a high speed dual channel multiplexer with output enable capability. The select inputs determine one of four active data inputs for each multiplexer. An output enable forces both outputs low when in the high state. • PD = 305 mW typ/pkg (No Load) • tpd = 3.5 ns typ (Dta to ou

Dual 4 to 1 Multiplexer

The MC10174 is a high speed dual channel multiplexer with output enable capability. The select inputs determine one of four active data inputs for each multiplexer. An output enable forces both outputs low when in the high state. • PD = 305 mW typ/pkg (No Load) • tpd = 3.5 ns typ (Dta to ou

Dual 4 to 1 Multiplexer

The MC10174 is a high speed dual channel multiplexer with output enable capability. The select inputs determine one of four active data inputs for each multiplexer. An output enable forces both outputs low when in the high state. • PD = 305 mW typ/pkg (No Load) • tpd = 3.5 ns typ (Dta to ou

Dual 4 to 1 Multiplexer

The MC10174 is a high speed dual channel multiplexer with output enable capability. The select inputs determine one of four active data inputs for each multiplexer. An output enable forces both outputs low when in the high state. • PD = 305 mW typ/pkg (No Load) • tpd = 3.5 ns typ (Dta to ou

Dual 4 to 1 Multiplexer

The MC10174 is a high speed dual channel multiplexer with output enable capability. The select inputs determine one of four active data inputs for each multiplexer. An output enable forces both outputs low when in the high state. • PD = 305 mW typ/pkg (No Load) • tpd = 3.5 ns typ (Dta to ou

Quint Latch

The MC10175 is a high speed, low power quint latch. It features five D type latches with common reset and a common two–input clock. Data is transferred on the negative edge of the clock and latched on the positive edge. The two clock inputs are “OR”ed together. Any change on the data input will b

Hex D Master/Slave Flip-Flop

Hex D Master/Slave Flip-Flop The MC10176 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going Clock transition. Thus, outputs may

Binary Counter

The MC10178 is a four–bit counter capable of divide–by–two, divide–by–four, divide–by–eight or a divide–by–sixteen function. Clock inputs trigger on the positive going edge of the clock pulse. Set and Reset inputs override the clock, allowing asynchronous “set” or “clear.” Individual Set and comm

Dual Binary to 1-4 Decoder (Low)

文件：112.48 Kbytes Page：8 Pages

Dual Binary to 1-4 Decoder(Low)

Dual Binary to 1-4 Decoder (Low)

文件：112.48 Kbytes Page：8 Pages

Dual Binary to 1-4 Decoder (Low)

文件：112.48 Kbytes Page：8 Pages

Dual Binary to 1-4 Decoder (Low)

文件：112.48 Kbytes Page：8 Pages

Dual Binary to 1-4 Decoder (Low)

文件：112.48 Kbytes Page：8 Pages

Dual Binary to 1-4 Decoder(High)

Quad 2-Input Multiplexer/Latch

Quad 2-Input Multiplexer/ Latch

文件：111.76 Kbytes Page：8 Pages

Quad 2-Input Multiplexer/ Latch

文件：111.76 Kbytes Page：8 Pages

Quad 2-Input Multiplexer/ Latch

文件：111.76 Kbytes Page：8 Pages

Quad 2-Input Multiplexer/ Latch

文件：111.76 Kbytes Page：8 Pages

Quad 2-Input Multiplexer/ Latch

文件：111.76 Kbytes Page：8 Pages

Dual 4 to 1 Multiplexer

文件：91.04 Kbytes Page：4 Pages

Dual 4 to 1 Multiplexer

文件：91.04 Kbytes Page：4 Pages

Dual 4 to 1 Multiplexer

文件：91.04 Kbytes Page：4 Pages

Dual 4 to 1 Multiplexer

文件：91.04 Kbytes Page：4 Pages

Dual 4 to 1 Multiplexer

文件：91.04 Kbytes Page：4 Pages

Quint Latch

文件：109.93 Kbytes Page：8 Pages

Quint Latch

文件：109.93 Kbytes Page：8 Pages

Quint Latch

文件：109.93 Kbytes Page：8 Pages

Quint Latch

文件：109.93 Kbytes Page：8 Pages

Quint Latch

文件：109.93 Kbytes Page：8 Pages

Hex D Master/Slave Flip-Flop

文件：109.66 Kbytes Page：8 Pages

Hex D Master/Slave Flip-Flop

文件：109.66 Kbytes Page：8 Pages

Hex D Master/Slave Flip-Flop

文件：109.66 Kbytes Page：8 Pages

Hex D Master/Slave Flip-Flop

文件：109.66 Kbytes Page：8 Pages

Hex D Master/Slave Flip-Flop

文件：109.66 Kbytes Page：8 Pages

Binary Counter

文件：112.5 Kbytes Page：8 Pages

Binary Counter

文件：112.5 Kbytes Page：8 Pages

Binary Counter

文件：112.5 Kbytes Page：8 Pages

Binary Counter

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Binary Counter

文件：112.5 Kbytes Page：8 Pages

1017 General Service Pressure Gauge

FEATURES „ Solid-front case design for safety „ Ideal gauge for panel mounting „ PLUS!™ Performance option to dampen vibration, shock and pulsation effects to provide a liquid-fill performance in a dry gauge

Heyco짰 Original Strain Relief Bushings

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Original Strain Relief Bushings

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PIEZOELECTRIC ACCELEROMETER

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Pulse Transformers

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