3.3V ECL 2:8 Differential Fanout Buffer

文件：128.65 Kbytes Page：7 Pages

封装/外壳：28-LCC（J 形引线） 包装：管件 描述：IC CLK BUFFER 2:8 1GHZ 28PLCC 集成电路（IC） 时钟缓冲器，驱动器

3.3 V ECL 2:8 Differential Fanout Buffer

文件：158.58 Kbytes Page：7 Pages

3.3V ECL 2:8 Differential Fanout Buffer

文件：128.65 Kbytes Page：7 Pages

3.3V ECL 2:8 Differential Fanout Buffer

文件：128.65 Kbytes Page：7 Pages

封装/外壳：28-LCC（J 形引线） 包装：管件 描述：IC CLK BUFFER 2:8 1GHZ 28PLCC 集成电路（IC） 时钟缓冲器，驱动器

3.3 V ECL 2:8 Differential Fanout Buffer

文件：158.58 Kbytes Page：7 Pages

3.3V ECL 2:8 Differential Fanout Buffer

文件：128.65 Kbytes Page：7 Pages

ECL/PECL 2:8 Differential Clock Driver

DESCRIPTION The AZ100LVE310 is a low skew 2:8 fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The AZ100LVE310 offers two selectable clock inputs allowing redundant or test clocks to be incorporated

ECL/PECL 2:8 Differential Clock Driver

[ARIZONA MICROTEK, INC.] DESCRIPTION The AZ100LVE310 is a low skew 2:8 fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The AZ100LVE310 offers two selectable clock inputs allowing redundant or test

ECL/PECL 2:8 Differential Clock Driver

DESCRIPTION The AZ100LVE310 is a low skew 2:8 fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The AZ100LVE310 offers two selectable clock inputs allowing redundant or test clocks to be incorporated

ECL/PECL 2:8 Differential Clock Driver

[ARIZONA MICROTEK, INC.] DESCRIPTION The AZ100LVE310 is a low skew 2:8 fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The AZ100LVE310 offers two selectable clock inputs allowing redundant or test

ECL/PECL 2:8 Differential Clock Driver

[ARIZONA MICROTEK, INC.] DESCRIPTION The AZ100LVE310 is a low skew 2:8 fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The AZ100LVE310 offers two selectable clock inputs allowing redundant or test