3.3V LVCMOS-to-LVPECL 1:4 Fanout Buffer

Features • 4 differential LVPECL outputs • 2 selectable LVCMOS/LVTTL inputs • 1 GHz maximum output frequency • Translates LVCMOS/LVTTL levels to LVPECL levels • 30 ps maximum output skew • 190 ps part-to-part skew • 3.3 V operating range • 20-lead TSSOP package • Ambient temperature range

3.3V LVCMOS-to-LVPECL,1:4 Fanout Buffer

The MC100ES6535 is a low skew, high performance 3.3 V 1-to-4 LVCMOS to LVPECL fanout buffer. The ES6535 has two selectable inputs that allow LVCMOS or LVTTL input levels which translate to LVPECL outputs. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asyn 4 differential LVPECL outputs\n2 selectable LVCMOS/LVTTL inputs\n1 GHz maximum output frequency\nTranslates LVCMOS/LVTTL levels to LVPECL levels\n30 ps maximum output skew\n190 ps part-to-part skew\n3.3 V operating range\n20-lead TSSOP package\nAmbient temperature range –40°C to +85°C\n20-lead Pb-fr;

3.3V LVCMOS to LVPECL 1:4 Fanout Buffer

3.3V LVCMOS-to-LVPECL 1:4 Fanout Buffer

Features • 4 differential LVPECL outputs • 2 selectable LVCMOS/LVTTL inputs • 1 GHz maximum output frequency • Translates LVCMOS/LVTTL levels to LVPECL levels • 30 ps maximum output skew • 190 ps part-to-part skew • 3.3 V operating range • 20-lead TSSOP package • Ambient temperature range

3.3V LVCMOS-to-LVPECL 1:4 Fanout Buffer

Features • 4 differential LVPECL outputs • 2 selectable LVCMOS/LVTTL inputs • 1 GHz maximum output frequency • Translates LVCMOS/LVTTL levels to LVPECL levels • 30 ps maximum output skew • 190 ps part-to-part skew • 3.3 V operating range • 20-lead TSSOP package • Ambient temperature range

3.3V LVCMOS-to-LVPECL 1:4 Fanout Buffer

Features • 4 differential LVPECL outputs • 2 selectable LVCMOS/LVTTL inputs • 1 GHz maximum output frequency • Translates LVCMOS/LVTTL levels to LVPECL levels • 30 ps maximum output skew • 190 ps part-to-part skew • 3.3 V operating range • 20-lead TSSOP package • Ambient temperature range

3.3V LVCMOS-to-LVPECL 1:4 Fanout Buffer

Features • 4 differential LVPECL outputs • 2 selectable LVCMOS/LVTTL inputs • 1 GHz maximum output frequency • Translates LVCMOS/LVTTL levels to LVPECL levels • 30 ps maximum output skew • 190 ps part-to-part skew • 3.3 V operating range • 20-lead TSSOP package • Ambient temperature range

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC CLK BUFFER 2:4 1GHZ 20TSSOP 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC CLK BUFFER 2:4 1GHZ 20TSSOP 集成电路（IC） 时钟缓冲器，驱动器

IC CLK BUFFER 2:4 1GHZ 20TSSOP