时钟驱动器，1:5 差分，ECL / HSTL，3.3 V / 5.0 V

The MC100EP14 is a low skew 1-to-5differential driver, designed with clock distribution in mind, accepting two clock sources into an inputmultiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operati • 400 ps Typical Propagation Delay\n• 100 ps Device-to-Device Skew\n• 25 ps Within Device Skew\n• Maximum Frequency > 2 GHz Typical\n• The 100 Series Contains Temperature Compensation\n• PECL and HSTL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V\n• NECL Mode: VCC = 0 V with VEE = -3.0 V to -5.5 V\n• Op;

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：66.98 Kbytes Page：8 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：132.37 Kbytes Page：9 Pages

相位频率检测器，3.3 V，ECL

The MC100EP140 is a three state phase frequency-detector intended for phase-locked loop applications which require a minimum amount of phase and frequency difference at lock. Since the part is designed with fully differential gates, the noise is reduced throughout the circuit, especially at high spe • 500 ps Typical Propagation Delay\n• Maximum Frequency > 2.1 Ghz Typical\n• Fully Differential Internally\n• Advanced High Band Output Swing of 400 mV\n• Transfer Gain: 1.0 mV/Degree at 1.4 GHz, 1.2 mV/Degree at 1.0 GHz\n• Rise and Fall Time: 100 ps Typical\n• The 100 Series Contains Temperature Co;

ECL 9 位移位寄存器

The MC10EP/100EP142 is a 9-bit shift register, designed with byte-parity applications in mind. The E142 performs serial/parallel in andserial/parallel out, shifting in one direction. The nine inputs D0 - D8 accept parallel input data, while S-IN accepts serial input data. The Qn outputs do not need • > 3 GHz Minimum Shift Frequency\n• 9-Bit for Byte-Parity Applications\n• Asynchronous Master Reset\n• Dual Clocks\n• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V\n• NECL Mode Operating Range: VCC = 0 V with VEE = –3.0 V to –5.5 V\n• Open Input Default State\n• Safety Clamp on Inp;

3.3 V / 5 V ECL 9-Bit Shift Register

3.3 V / 5 V ECL 9−Bit Shift Register The MC10EP/100EP142 is a 9−bit shift register, designed with byte-parity applications in mind. The MC10/100EP142 is capable of performing serial/parallel data into serial/parallel out and shifting in only one direction. The nine inputs D0 − D8 accept parallel

3.3 V / 5 V ECL 9-Bit Shift Register

3.3 V / 5 V ECL 9−Bit Shift Register The MC10EP/100EP142 is a 9−bit shift register, designed with byte-parity applications in mind. The MC10/100EP142 is capable of performing serial/parallel data into serial/parallel out and shifting in only one direction. The nine inputs D0 − D8 accept parallel

3.3 V / 5 V ECL 9-Bit Shift Register

3.3 V / 5 V ECL 9−Bit Shift Register The MC10EP/100EP142 is a 9−bit shift register, designed with byte-parity applications in mind. The MC10/100EP142 is capable of performing serial/parallel data into serial/parallel out and shifting in only one direction. The nine inputs D0 − D8 accept parallel

3.3 V / 5 V ECL 9-Bit Shift Register

3.3 V / 5 V ECL 9−Bit Shift Register The MC10EP/100EP142 is a 9−bit shift register, designed with byte-parity applications in mind. The MC10/100EP142 is capable of performing serial/parallel data into serial/parallel out and shifting in only one direction. The nine inputs D0 − D8 accept parallel

3.3 V / 5 V ECL 9-Bit Shift Register

3.3 V / 5 V ECL 9−Bit Shift Register The MC10EP/100EP142 is a 9−bit shift register, designed with byte-parity applications in mind. The MC10/100EP142 is capable of performing serial/parallel data into serial/parallel out and shifting in only one direction. The nine inputs D0 − D8 accept parallel

3.3 V / 5 V ECL 9-Bit Shift Register

3.3 V / 5 V ECL 9−Bit Shift Register The MC10EP/100EP142 is a 9−bit shift register, designed with byte-parity applications in mind. The MC10/100EP142 is capable of performing serial/parallel data into serial/parallel out and shifting in only one direction. The nine inputs D0 − D8 accept parallel

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：132.37 Kbytes Page：9 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：91.19 Kbytes Page：8 Pages

3.3V ECL Phase?묯requency Detector

文件：117.5 Kbytes Page：6 Pages

3.3VECL Phase-Frequency Detector

文件：55.83 Kbytes Page：8 Pages

3.3V ECL Phase?묯requency Detector

文件：117.5 Kbytes Page：6 Pages

3.3V ECL Phase?묯requency Detector

文件：117.5 Kbytes Page：6 Pages

3.3VECL Phase-Frequency Detector

文件：55.83 Kbytes Page：8 Pages

3.3V ECL Phase?묯requency Detector

文件：117.5 Kbytes Page：6 Pages

3.3VECL Phase-Frequency Detector

文件：55.83 Kbytes Page：8 Pages

3.3V ECL Phase?묯requency Detector

文件：117.5 Kbytes Page：6 Pages

3.3V ECL Phase?묯requency Detector

文件：117.5 Kbytes Page：6 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：托盘 描述：IC DETECT PHASE-FREQ ECL 8-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

3.3 V/5 V ECL 9-Bit Shift Register

文件：219.55 Kbytes Page：11 Pages

3.3 V/5 V ECL 9-Bit Shift Register

文件：219.55 Kbytes Page：11 Pages

封装/外壳：32-LQFP 功能：通用 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC REGISTER SHFT 9BIT ECL 32LQFP 集成电路（IC） 移位寄存器

ECL 9-Bit Shift Register

文件：133.36 Kbytes Page：14 Pages

ECL 9-Bit Shift Register

文件：133.36 Kbytes Page：14 Pages

ECL 9-Bit Shift Register

文件：133.36 Kbytes Page：14 Pages

ECL 9-Bit Shift Register

文件：133.36 Kbytes Page：14 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：66.98 Kbytes Page：8 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：132.37 Kbytes Page：9 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：66.98 Kbytes Page：8 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：132.37 Kbytes Page：9 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：91.19 Kbytes Page：8 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：66.98 Kbytes Page：8 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：132.37 Kbytes Page：9 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：132.37 Kbytes Page：9 Pages

3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver

文件：91.19 Kbytes Page：8 Pages

2.5V/3.3V/5V 1:5 LVPECL/PECL/ ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX

文件：71.94 Kbytes Page：9 Pages