双驱动器/比较器/负载，内置DAC

MAX9973/MAX9974是完全集成的高性能、双通道引脚电子驱动器/比较器/负载(DCL)，内置电平设置数模转换器(DAC)，非常适合于内存和SOC自动测试设备(ATE)。器件的每个通道都含有一个三电平引脚驱动器、一个窗口比较器、动态钳位、一个1kΩ负载和7个独立的电平设置DAC。\n 驱动器可在较宽的电压范围内高速率工作，包括高阻和有源端接(第三级驱动)模式，即使在低电压摆幅下仍具有高线性度。另外，驱动器可提供高速差分多路复用控制输入，并具有可兼容ECL、LVPECL、LVDS和GTL的内置端接电阻。窗口比较器在摆率、脉宽或过驱动电压改变时可提供极低的时域变化，并且具有集电极开路输出。当 \n• 3V电压时可达600Mbps高速 \n• 极低功耗：每通道700mW \n• -1.5V至+6.5V宽电压范围 \n• 200mV至8V宽电压摆幅范围 \n• 10nA (典型值)低漏电流模式 \n• 集成动态端接(第三级驱动) \n• 集成电压箝位 \n• 无源负载或上拉 \n• 极低时域色散 \n• 外部元件数量最少 \n• SPI™兼容串行控制接口;

Dual Driver/Comparator/Load with Internal DACs

文件：382.38 Kbytes Page：26 Pages

Dual Driver/Comparator/Load with Internal DACs

文件：382.38 Kbytes Page：26 Pages

Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing??Core

GENERAL DESCRIPTION The AD9974 is a highly integrated, dual-channel, chargecoupled device (CCD) signal processor for high speed digital video camera applications. Each channel is specified at pixel rates of up to 65 MHz. The AD9974 consists of a complete analog front end (AFE) with analog-to-digi

3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Description The Z9974 is a low-cost 3.3V zero delay clock driver for high-speed signal buffering and redistribution. Features • Output Frequency up to 125 MHz • Supports PowerPC®, and Pentium® processors • 15 Clock outputs: frequency configurable • Two Reference clock inputs for dynamic togg

3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Description The Z9974 is a low-cost 3.3V zero delay clock driver for high-speed signal buffering and redistribution. Features • Output Frequency up to 125 MHz • Supports PowerPC®, and Pentium® processors • 15 Clock outputs: frequency configurable • Two Reference clock inputs for dynamic togg