Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing??Core

GENERAL DESCRIPTION The AD9974 is a highly integrated, dual-channel, chargecoupled device (CCD) signal processor for high speed digital video camera applications. Each channel is specified at pixel rates of up to 65 MHz. The AD9974 consists of a complete analog front end (AFE) with analog-to-digi

双通道、14位CCD信号处理器，内置Precision Timing™内核

AD9974是一款适合高速数码摄像机应用的高度集成双通道CCD信号处理器。每个通道的额定像素速率最高达65 MHz。AD9974由带模数转换功能的完整模拟前端和可编程时序驱动器组成。在65 MHz下工作时，Precision Timing内核允许以大约240 ps的分辨率调整高速时钟。\n每个模拟前端均包括黑色电平箝位、CDS、VGA和一个65 MSPS、14位ADC。时序驱动器为RG_A、RG_B、H1A至H4A和H1B至H4B输出提供高速CCD时钟驱动器。采用三线式串行接口对AD9974的每个通道进行编程。\nAD9974采用节省空间的9 mm x 9 mm CSP_BGA封装，额定工作温 模拟与数字内核电压：1.8 V\n相关双采样器（CDS），增\n益−3 dB、0 dB、+3 dB和+6 dB\n6 dB至42 dB、10位可变增益放大器（VGA）\n14位、65 MHz模数转换器（ADC）\n具有可变电平控制功能的黑色电平箝位\n完整的片内时序发生器\nPrecision Timing内核，分辨率为240 ps（65 MHz）\n片内3 V水平和RG驱动器\n100引脚、9 mm × 9 mm、0.8 mm间距CSP_BGA封装\n内部LDO调节器电路;

Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing Core

GENERAL DESCRIPTION The AD9974 is a highly integrated, dual-channel, chargecoupled device (CCD) signal processor for high speed digital video camera applications. Each channel is specified at pixel rates of up to 65 MHz. The AD9974 consists of a complete analog front end (AFE) with analog-to-digi

Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing Core

GENERAL DESCRIPTION The AD9974 is a highly integrated, dual-channel, chargecoupled device (CCD) signal processor for high speed digital video camera applications. Each channel is specified at pixel rates of up to 65 MHz. The AD9974 consists of a complete analog front end (AFE) with analog-to-digi

Dual-Channel, 14-Bit, CCD Signal

文件：902.05 Kbytes Page：52 Pages

封装/外壳：100-LFBGA，CSPBGA 包装：管件 描述：IC CCDSP DUAL 14BIT 100CSBGA 集成电路（IC） 传感器和检测器接口

封装/外壳：100-LFBGA，CSPBGA 包装：管件 描述：IC CCDSP DUAL 14BIT 100CSBGA 集成电路（IC） 传感器和检测器接口

3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Description The Z9974 is a low-cost 3.3V zero delay clock driver for high-speed signal buffering and redistribution. Features • Output Frequency up to 125 MHz • Supports PowerPC®, and Pentium® processors • 15 Clock outputs: frequency configurable • Two Reference clock inputs for dynamic togg

3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Description The Z9974 is a low-cost 3.3V zero delay clock driver for high-speed signal buffering and redistribution. Features • Output Frequency up to 125 MHz • Supports PowerPC®, and Pentium® processors • 15 Clock outputs: frequency configurable • Two Reference clock inputs for dynamic togg

Dual Driver/Comparator/Load with Internal DACs

文件：382.38 Kbytes Page：26 Pages

Dual Driver/Comparator/Load with Internal DACs

文件：382.38 Kbytes Page：26 Pages