27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer

General Description The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control phase, the input is converted to 9 bits of parallel

27位、3MHz至35MHz、直流平衡、LVDS解串器

MAX9218数字视频串/并转换器在数据和控制周期对总共27位数据解串。在数据周期，LVDS串行输入被转换为18位并行视频数据，在控制周期，输入被转换为9位并行控制数据。分开的视频和控制周期充分利用视频时序来降低串行数据速率。MAX9218与MAX9217串行器组成一个完整的数字视频传输系统。\n\n 专用数据解码降低EMI并提供DC平衡。DC平衡允许使用AC耦合，为发送和接收之间提供隔离。MAX9218具有可选的上升沿或下降沿输出锁定。\n\n ESD容限符合ISO 10605的±10kV接触放电和±30kV气隙放电规范。\n\n MAX9218内核电压为+3. • 专用数据解码实现DC平衡并降低EMI\n• 视频消隐期间解串控制数据\n• 5位控制数据输入为一位的误差容限\n• 输出转换时间根据工作频率调整以降低EMI\n• 输出分组转换以降低EMI\n• 输出使能允许使用输出总线\n• 锁定时时钟脉冲延展\n• 宽至±2%的参考时钟容限\n• 无需外部控制即可与MAX9217串行器同步\n• ISO 10605 ESD保护\n• 独立输出电源实现与1.8V至3.3V逻辑接口\n• +3.3V内核电源\n• 节省空间的薄型QFN和LQFP封装\n• -40°C至+85°C工作温度范围;

Fully Assembled and Tested

文件：1.43721 Mbytes Page：12 Pages

27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer

General Description The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control phase, the input is converted to 9 bits of parallel

27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer

General Description The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control phase, the input is converted to 9 bits of parallel

封装/外壳：48-LQFP 功能：解串器 包装：管件 描述：IC SERIALIZER LVDS 48LQFP 集成电路（IC） 串行器，解串器

封装/外壳：48-LQFP 功能：解串器 包装：卷带（TR） 描述：IC SERIALIZER LVDS 48LQFP 集成电路（IC） 串行器，解串器

Fully Assembled and Tested

文件：1.43721 Mbytes Page：12 Pages

Low-Cost Line Interface

Description This general-purpose electronic subscriber loop interface circuit (SLIC) is optimized for low cost, while still providing a satisfactory set of features. The L9218 is pin-for-pin compatible with the Agere L9219 and L9217 SLICs. The L9218 requires a 5 V power supply and single batter

Low-Cost Line Interface

Description This general-purpose electronic subscriber loop interface circuit (SLIC) is optimized for low cost, while still providing a satisfactory set of features. The L9218 is pin-for-pin compatible with the Agere L9219 and L9217 SLICs. The L9218 requires a 5 V power supply and single batter

Low-Cost Line Interface

Description This general-purpose electronic subscriber loop interface circuit (SLIC) is optimized for low cost, while still providing a satisfactory set of features. The L9218 is pin-for-pin compatible with the Agere L9219 and L9217 SLICs. The L9218 requires a 5 V power supply and single batter

Low-Cost Line Interface

Description This general-purpose electronic subscriber loop interface circuit (SLIC) is optimized for low cost, while still providing a satisfactory set of features. The L9218 is pin-for-pin compatible with the Agere L9219 and L9217 SLICs. The L9218 requires a 5 V power supply and single batter

Silicon NPN epitaxial planer transistor

For digital circuits ■ Features ● Costs can be reduced through downsizing of the equipment and reduction of the number of parts. ● SS-Mini type package, allowing automatic insertion through tape packing and magazine packing.