27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer

General Description The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control phase, the input is converted to 9 bits of parallel

包装：散装 描述：IC DESERIALIZER LVDS 48-TQFN 集成电路（IC） 串行器，解串器

封装/外壳：48-WFQFN 裸露焊盘 功能：解串器 包装：卷带（TR） 描述：IC DESERIALIZER LVDS 48-TQFN 集成电路（IC） 串行器，解串器

Low-Cost Line Interface

Description This general-purpose electronic subscriber loop interface circuit (SLIC) is optimized for low cost, while still providing a satisfactory set of features. The L9218 is pin-for-pin compatible with the Agere L9219 and L9217 SLICs. The L9218 requires a 5 V power supply and single batter

Low-Cost Line Interface

Description This general-purpose electronic subscriber loop interface circuit (SLIC) is optimized for low cost, while still providing a satisfactory set of features. The L9218 is pin-for-pin compatible with the Agere L9219 and L9217 SLICs. The L9218 requires a 5 V power supply and single batter

Low-Cost Line Interface

Description This general-purpose electronic subscriber loop interface circuit (SLIC) is optimized for low cost, while still providing a satisfactory set of features. The L9218 is pin-for-pin compatible with the Agere L9219 and L9217 SLICs. The L9218 requires a 5 V power supply and single batter

Low-Cost Line Interface

Description This general-purpose electronic subscriber loop interface circuit (SLIC) is optimized for low cost, while still providing a satisfactory set of features. The L9218 is pin-for-pin compatible with the Agere L9219 and L9217 SLICs. The L9218 requires a 5 V power supply and single batter

Silicon NPN epitaxial planer transistor

For digital circuits ■ Features ● Costs can be reduced through downsizing of the equipment and reduction of the number of parts. ● SS-Mini type package, allowing automatic insertion through tape packing and magazine packing.