Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23

General Description The MAX9111/MAX9113 single/dual low-voltage differential signaling (LVDS) receivers are designed for high speed applications requiring minimum power consumption, space, and noise. Both devices support switching rates exceeding 500Mbps while operating from a single +3.3V supp

Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23

文件：116.94 Kbytes Page：10 Pages

Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23

文件：1.65656 Mbytes Page：12 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC RECEIVER 0/2 8SOIC 集成电路（IC） 驱动器，接收器，收发器

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC RECEIVER 0/2 8SOIC 集成电路（IC） 驱动器，接收器，收发器

ROUND INSTRUMENTATION HANDLES

[KEYSTONE] ROUND INSTRUMENTATION HANDLES FERRULES HANDLE MOUNTING SCREWS

SHIELDED ADJUSTABLE RF COILS

[J.W.MILLER]

Isolated, Sigma-Delta ADCs with SPI

FEATURES ► 2 (ADE9112) or 3 (ADE9113) channel isolated, simultaneously sampling Σ-Δ ADCs, with integrated isoPower, isolated dc-to-dc converters ► 3 (ADE9103) channel nonisolated, simultaneously sampling Σ-Δ ADCs ► Synchronization of multiple ADE9103/ADE9112/ADE9113 devices ► 4-wire SPI wit

Isolated, Sigma-Delta ADCs with SPI

FEATURES ► 2 (ADE9112) or 3 (ADE9113) channel isolated, simultaneously sampling Σ-Δ ADCs, with integrated isoPower, isolated dc-to-dc converters ► 3 (ADE9103) channel nonisolated, simultaneously sampling Σ-Δ ADCs ► Synchronization of multiple ADE9103/ADE9112/ADE9113 devices ► 4-wire SPI wit

Releasable Type T Rivets

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