丝印代码：ABH；Low-Noise 500mA LDO Regulators in a 2mm x 2mm TDFN Package

General Description The MAX8902A/MAX8902B low-noise linear regulators deliver up to 500mA of output current with only 16µVRMS of output noise in a 100kHz bandwidth. These regulators maintain their output voltage over a wide input range, requiring only 100mV of input-to-output headroom at full l

丝印代码：ABH；Low-Noise 500mA LDO Regulators in a 2mm x 2mm TDFN Package

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Low-Noise 500mA LDO Regulators in a 2mm x 2mm TDFN Package

文件：355.01 Kbytes Page：9 Pages

Low-Noise 500mA LDO Regulators in a 2mm x 2mm TDFN Package

文件：355.01 Kbytes Page：9 Pages

DC FAN Motor Controller

Description The FAN8902 is a monolithic integrated circuit, designed for the PWM control of a DC fan motor current in an automotive systems. It allows the fan motor speed to be controlled linearly and efficiently. Features • Built-in PWM Current Control Circuit • Built-in 5V Regulator • Low S

3-Channel Clock Driver

Overview • The LB8902M is designed to drive a capacitive load at a high speed. • Suited for horizontal clock drive of CCD image sensor. Functions and Features • 3-channel inverter buffer amplifier. • Fast propagation time (10ns typ. for 100pF load). • Low-voltage operation available (5V min)

3-Channel Clock Driver

Overview • The LB8902M is designed to drive a capacitive load at a high speed. • Suited for horizontal clock drive of CCD image sensor. Functions and Features • 3-channel inverter buffer amplifier. • Fast propagation time (10ns typ. for 100pF load). • Low-voltage operation available (5V min)

Digital Audio Interface Receiver

Overview The LC8902 and LC8902Q are receiver LSIs for applications in which data is transmitted between digital audio equipment in the EIAJ format. These LSIs synchronize with the input signal and demodulate that signal to a regular format signal. Features • Built-in PLL circuit synchroniz

Digital Audio Interface Receiver

Overview The LC8902 and LC8902Q are receiver LSIs for applications in which data is transmitted between digital audio equipment in the EIAJ format. These LSIs synchronize with the input signal and demodulate that signal to a regular format signal. Features • Built-in PLL circuit synchroniz